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ada-streamunlimiteddasty
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S195xDTS: define dabfm input
Add a definition of DAB/FM sound card: - SPI on ECSPI1, reset on GPIO05_I09 (torvalds#105) - DAI link on SAI6 - bit & ws clocks from ADC - SAI2 enabled to provide MCLK for ADC, but bit & ws clocks slave Based on: POC by Tony Gao <[email protected]> For this to work reliably, only the ADC should provide I2S clocks, SAI1, SAI2 and SAI6 being slaves on RX side. All three, or at least two (depending on AUX/HDMI_SWITCH) are connected to ADC in StreamKit 1955. At the same time, SAI2 has to provide continuous master clock for ADC. Signed-off-by: Andriy Danylovskyy <[email protected]>
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/*
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* arch/arm64/boot/dts/streamunlimited/fsl-imx8mm-sue-stream195x-kit1955-dabfm.dtsi
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*
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* Copyright (C) 2021 StreamUnlimited, Inc. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*/
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/*
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* DT for the removable dabfm module.
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*/
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/ {
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sue {
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daughterboard = "dabfm";
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};
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sound-dabfm {
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compatible = "sue,stream195x-audio";
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sue-card,name = "dabfm";
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sue-card,dai-link@2 {
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format = "i2s";
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frame-master = <&dailink2_codec>;
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bitclock-master = <&dailink2_codec>;
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dailink2_cpu: cpu {
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sound-dai = <&sai6>;
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dai-tdm-slot-num = <2>;
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dai-tdm-slot-width = <32>;
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};
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dailink2_codec: codec {
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use-dummy-codec;
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};
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};
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};
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sound-sai2 {
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compatible = "sue,stream195x-audio";
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sue-card,name = "sai2card";
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sue-card,dai-link@4 {
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format = "i2s";
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frame-master = <&dailink4_codec>;
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bitclock-master = <&dailink4_codec>;
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continuous-clock;
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dailink4_cpu: cpu {
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sound-dai = <&sai2>;
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dai-tdm-slot-num = <2>;
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dai-tdm-slot-width = <32>;
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};
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dailink4_codec: codec {
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use-dummy-codec;
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};
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};
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};
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
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num-cs = <1>;
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cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
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status = "okay";
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dabfm: dabfm@0 {
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status = "okay";
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reg = <0>;
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compatible = "sue,dabfm";
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/* It's set to 10MHz which is 1MHz more than dabfm driver,
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* which is different from stream1832 where they are same
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*/
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spi-max-frequency = <10000000>;
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};
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};
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&sai6 {
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#sound-dai-cells = <0>; /* This is required for the simple-audio-card to work */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai6_rx>;
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/* override interrupt since it's using same one as SAI5 by default */
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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status = "okay";
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/*
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* This is conjunction with `dai-tdm-slot-num = <2>;` makes sure that
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* for 8 channel playback 8 ch / 2 slots = 4 pins are used with a mask
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* of 0xf.
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* /
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/* first number is pins, second is rx mask, third is tx mask */
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fsl,dataline = <
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1 0x1 0x1
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2 0x3 0x3
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3 0x7 0x7
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4 0xf 0xf
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>;
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fsl,sai-asynchronous;
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};
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&sai2 {
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#sound-dai-cells = <0>; /* This is required for the simple-audio-card to work */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai2_rx &pinctrl_sai2_clk>;
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assigned-clocks = <&clk IMX8MM_CLK_SAI2>;
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assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <24576000>;
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status = "okay";
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};

arch/arm64/boot/dts/streamunlimited/fsl-imx8mm-sue-stream195x-kit1955.dtsi

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>;
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};
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK (PAD_CTL_PE_DOWN | PAD_CTL_FAST | PAD_CTL_HYS | PAD_CTL_DSE4x)
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MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI (PAD_CTL_PE_DOWN | PAD_CTL_FAST | PAD_CTL_HYS | PAD_CTL_DSE4x)
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MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO (PAD_CTL_PE_DOWN | PAD_CTL_FAST | PAD_CTL_HYS)
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>;
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};
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pinctrl_ecspi1_cs: ecspi1cs {
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fsl,pins = <
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MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 (PAD_CTL_PE_DOWN | PAD_CTL_HYS)
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>;
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};
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pinctrl_sai1_rx: sai1rxgrp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI1_RXFS_SAI1_RX_SYNC (PAD_CTL_PE_DOWN | PAD_CTL_HYS | PAD_CTL_FAST)
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>;
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};
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pinctrl_sai2_rx: sai2rxgrp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 (PAD_CTL_PE_DOWN | PAD_CTL_HYS | PAD_CTL_FAST)
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MX8MM_IOMUXC_SAI2_RXC_SAI2_RX_BCLK (PAD_CTL_PE_DOWN | PAD_CTL_HYS | PAD_CTL_FAST | PAD_CTL_DSE4x)
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MX8MM_IOMUXC_SAI2_RXFS_SAI2_RX_SYNC (PAD_CTL_PE_DOWN | PAD_CTL_HYS | PAD_CTL_FAST | PAD_CTL_DSE4x)
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>;
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};
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pinctrl_sai2_clk: sai2clkgrp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI2_MCLK_SAI2_MCLK (PAD_CTL_PE_DOWN | PAD_CTL_HYS | PAD_CTL_FAST | PAD_CTL_DSE4x)
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>;
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};
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pinctrl_sai5_rx: sai5rxgrp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0 (PAD_CTL_PE_DOWN | PAD_CTL_HYS | PAD_CTL_FAST)
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>;
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};
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pinctrl_sai6_rx: sai6rxgrp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0 (PAD_CTL_PE_DOWN | PAD_CTL_HYS | PAD_CTL_FAST)
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MX8MM_IOMUXC_SAI1_RXD4_SAI6_RX_BCLK (PAD_CTL_PE_DOWN | PAD_CTL_HYS | PAD_CTL_FAST | PAD_CTL_DSE4x)
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MX8MM_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC (PAD_CTL_PE_DOWN | PAD_CTL_HYS | PAD_CTL_FAST | PAD_CTL_DSE4x)
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX (PAD_CTL_PE_DOWN | PAD_CTL_HYS)

arch/arm64/boot/dts/streamunlimited/fsl-imx8mm-sue-stream195x-l0-kit1955.dts

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#include "fsl-imx8mm-sue-stream195x-kit-lcd.dtsi"
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#include "fsl-imx8mm-sue-stream195x-kit1955-touchscreen.dtsi"
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#include "fsl-imx8mm-sue-stream195x-kit1955-pcmd3180.dtsi"
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#include "fsl-imx8mm-sue-stream195x-kit1955-dabfm.dtsi"

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