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[MC] Don't pass MCSubtargetInfo down to shouldForceRelocation and evaluateTargetFixup
This reverts the code change in commit e87f33d (llvm#73721) but keeps its test. llvm#73721, a workaround to generate necessary relocations in mixed non-relax/relax code, is no longer necessary after llvm#140692 fixed the root issue (whether two locations are separated by a fragment with indeterminate size due to linker relaxation).
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22 files changed

+34
-53
lines changed

22 files changed

+34
-53
lines changed

llvm/include/llvm/MC/MCAsmBackend.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -90,7 +90,7 @@ class MCAsmBackend {
9090

9191
// Hook used by the default `addReloc` to check if a relocation is needed.
9292
virtual bool shouldForceRelocation(const MCAssembler &, const MCFixup &,
93-
const MCValue &, const MCSubtargetInfo *) {
93+
const MCValue &) {
9494
return false;
9595
}
9696

@@ -111,7 +111,6 @@ class MCAsmBackend {
111111

112112
virtual bool evaluateTargetFixup(const MCAssembler &Asm, const MCFixup &Fixup,
113113
const MCFragment *DF, const MCValue &Target,
114-
const MCSubtargetInfo *STI,
115114
uint64_t &Value) {
116115
llvm_unreachable("Need to implement hook if target has custom fixups");
117116
}

llvm/lib/MC/MCAsmBackend.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -122,7 +122,7 @@ bool MCAsmBackend::addReloc(MCAssembler &Asm, const MCFragment &F,
122122
const MCFixup &Fixup, const MCValue &Target,
123123
uint64_t &FixedValue, bool IsResolved,
124124
const MCSubtargetInfo *STI) {
125-
if (IsResolved && shouldForceRelocation(Asm, Fixup, Target, STI))
125+
if (IsResolved && shouldForceRelocation(Asm, Fixup, Target))
126126
IsResolved = false;
127127
if (!IsResolved)
128128
Asm.getWriter().recordRelocation(Asm, &F, Fixup, Target, FixedValue);

llvm/lib/MC/MCAssembler.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -160,7 +160,7 @@ bool MCAssembler::evaluateFixup(const MCFixup &Fixup, const MCFragment *DF,
160160
unsigned FixupFlags = getBackend().getFixupKindInfo(Fixup.getKind()).Flags;
161161
if (FixupFlags & MCFixupKindInfo::FKF_IsTarget) {
162162
IsResolved =
163-
getBackend().evaluateTargetFixup(*this, Fixup, DF, Target, STI, Value);
163+
getBackend().evaluateTargetFixup(*this, Fixup, DF, Target, Value);
164164
} else {
165165
const MCSymbol *Add = Target.getAddSym();
166166
const MCSymbol *Sub = Target.getSubSym();

llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -96,8 +96,7 @@ class AArch64AsmBackend : public MCAsmBackend {
9696
unsigned getFixupKindContainereSizeInBytes(unsigned Kind) const;
9797

9898
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
99-
const MCValue &Target,
100-
const MCSubtargetInfo *STI) override;
99+
const MCValue &Target) override;
101100
};
102101

103102
} // end anonymous namespace
@@ -523,8 +522,7 @@ bool AArch64AsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
523522

524523
bool AArch64AsmBackend::shouldForceRelocation(const MCAssembler &Asm,
525524
const MCFixup &Fixup,
526-
const MCValue &Target,
527-
const MCSubtargetInfo *STI) {
525+
const MCValue &Target) {
528526
// The ADRP instruction adds some multiple of 0x1000 to the current PC &
529527
// ~0xfff. This means that the required offset to reach a symbol can vary by
530528
// up to one step depending on where the ADRP is in memory. For example:

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,7 @@ class AMDGPUAsmBackend : public MCAsmBackend {
5353
std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
5454
MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override;
5555
bool shouldForceRelocation(const MCAssembler &, const MCFixup &,
56-
const MCValue &, const MCSubtargetInfo *) override;
56+
const MCValue &) override;
5757
};
5858

5959
} //End anonymous namespace
@@ -194,8 +194,7 @@ MCFixupKindInfo AMDGPUAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
194194

195195
bool AMDGPUAsmBackend::shouldForceRelocation(const MCAssembler &,
196196
const MCFixup &,
197-
const MCValue &Target,
198-
const MCSubtargetInfo *) {
197+
const MCValue &Target) {
199198
return Target.getSpecifier();
200199
}
201200

llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -971,8 +971,7 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCAssembler &Asm,
971971

972972
bool ARMAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
973973
const MCFixup &Fixup,
974-
const MCValue &Target,
975-
const MCSubtargetInfo *STI) {
974+
const MCValue &Target) {
976975
const MCSymbol *Sym = Target.getAddSym();
977976
const unsigned FixupKind = Fixup.getKind();
978977
if (FixupKind == ARM::fixup_arm_thumb_bl) {

llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,7 @@ class ARMAsmBackend : public MCAsmBackend {
3131
MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override;
3232

3333
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
34-
const MCValue &Target,
35-
const MCSubtargetInfo *STI) override;
34+
const MCValue &Target) override;
3635

3736
unsigned adjustFixupValue(const MCAssembler &Asm, const MCFixup &Fixup,
3837
const MCValue &Target, uint64_t Value,

llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -377,7 +377,7 @@ bool AVRAsmBackend::addReloc(MCAssembler &Asm, const MCFragment &F,
377377
if (IsResolved) {
378378
auto TargetVal = MCValue::get(Target.getAddSym(), Target.getSubSym(),
379379
FixedValue, Target.getSpecifier());
380-
if (shouldForceRelocation(Asm, Fixup, TargetVal, STI))
380+
if (forceRelocation(Asm, Fixup, TargetVal, STI))
381381
IsResolved = false;
382382
}
383383
if (!IsResolved)
@@ -515,10 +515,9 @@ bool AVRAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
515515
return true;
516516
}
517517

518-
bool AVRAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
519-
const MCFixup &Fixup,
520-
const MCValue &Target,
521-
const MCSubtargetInfo *STI) {
518+
bool AVRAsmBackend::forceRelocation(const MCAssembler &Asm,
519+
const MCFixup &Fixup, const MCValue &Target,
520+
const MCSubtargetInfo *STI) {
522521
switch ((unsigned)Fixup.getKind()) {
523522
default:
524523
return false;

llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -52,9 +52,8 @@ class AVRAsmBackend : public MCAsmBackend {
5252
bool writeNopData(raw_ostream &OS, uint64_t Count,
5353
const MCSubtargetInfo *STI) const override;
5454

55-
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
56-
const MCValue &Target,
57-
const MCSubtargetInfo *STI) override;
55+
bool forceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
56+
const MCValue &Target, const MCSubtargetInfo *);
5857

5958
private:
6059
Triple::OSType OSType;

llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -253,8 +253,7 @@ bool CSKYAsmBackend::mayNeedRelaxation(const MCInst &Inst,
253253

254254
bool CSKYAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
255255
const MCFixup &Fixup,
256-
const MCValue &Target,
257-
const MCSubtargetInfo * /*STI*/) {
256+
const MCValue &Target /*STI*/) {
258257
if (Target.getSpecifier())
259258
return true;
260259
switch (Fixup.getTargetKind()) {

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