fix: Rename widen insta tests (#1949)

The last PR (#1946) introduced some non-deterministic behaviour in the
`cargo-insta` tests, due to the fact that multiple tests had the same
name so multiple outputs were written to the same file.

Author: croyzor

hugr-llvm/src/extension/int.rs

@@ -470,7 +470,7 @@ mod test {
             .unwrap();
         let hugr = test_int_op_with_results::<1>(ext_op, from, None, out_ty.into());
 
-        check_emission!(op.clone(), hugr, llvm_ctx);
+        check_emission!(format!("{}_{}_{}", op.clone(), from, to), hugr, llvm_ctx);
     }
     #[rstest]
     #[case::ieq("ieq", 1)]

hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__inarrow_u@[email protected]

@@ -0,0 +1,15 @@
+---
+source: hugr-llvm/src/extension/int.rs
+expression: mod_str
+---
+; ModuleID = 'test_context'
+source_filename = "test_context"
+
+define i64 @_hl.main.1(i8 %0) {
+alloca_block:
+  br label %entry_block
+
+entry_block:                                      ; preds = %alloca_block
+  %1 = zext i8 %0 to i64
+  ret i64 %1
+}

hugr-llvm/src/extension/snapshots/[email protected] renamed to hugr-llvm/src/extension/snapshots/[email protected]

@@ -0,0 +1,24 @@
+---
+source: hugr-llvm/src/extension/int.rs
+expression: mod_str
+---
+; ModuleID = 'test_context'
+source_filename = "test_context"
+
+define i64 @_hl.main.1(i8 %0) {
+alloca_block:
+  %"0" = alloca i64, align 8
+  %"2_0" = alloca i8, align 1
+  %"4_0" = alloca i64, align 8
+  br label %entry_block
+
+entry_block:                                      ; preds = %alloca_block
+  store i8 %0, i8* %"2_0", align 1
+  %"2_01" = load i8, i8* %"2_0", align 1
+  %1 = zext i8 %"2_01" to i64
+  store i64 %1, i64* %"4_0", align 4
+  %"4_02" = load i64, i64* %"4_0", align 4
+  store i64 %"4_02", i64* %"0", align 4
+  %"03" = load i64, i64* %"0", align 4
+  ret i64 %"03"
+}

hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_s@[email protected] renamed to hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_s_1_6@[email protected]

@@ -0,0 +1,14 @@
+---
+source: hugr-llvm/src/extension/int.rs
+expression: mod_str
+---
+; ModuleID = 'test_context'
+source_filename = "test_context"
+
+define i8 @_hl.main.1(i8 %0) {
+alloca_block:
+  br label %entry_block
+
+entry_block:                                      ; preds = %alloca_block
+  ret i8 %0
+}

hugr-llvm/src/extension/snapshots/[email protected] renamed to hugr-llvm/src/extension/snapshots/[email protected]

@@ -0,0 +1,23 @@
+---
+source: hugr-llvm/src/extension/int.rs
+expression: mod_str
+---
+; ModuleID = 'test_context'
+source_filename = "test_context"
+
+define i8 @_hl.main.1(i8 %0) {
+alloca_block:
+  %"0" = alloca i8, align 1
+  %"2_0" = alloca i8, align 1
+  %"4_0" = alloca i8, align 1
+  br label %entry_block
+
+entry_block:                                      ; preds = %alloca_block
+  store i8 %0, i8* %"2_0", align 1
+  %"2_01" = load i8, i8* %"2_0", align 1
+  store i8 %"2_01", i8* %"4_0", align 1
+  %"4_02" = load i8, i8* %"4_0", align 1
+  store i8 %"4_02", i8* %"0", align 1
+  %"03" = load i8, i8* %"0", align 1
+  ret i8 %"03"
+}