From e1ecce85ba7c5fb95a774b742f3d061489eaa63a Mon Sep 17 00:00:00 2001 From: Deepika Date: Wed, 19 Sep 2018 10:07:10 -0500 Subject: [PATCH 01/13] Nuvoton: Fix alignment of execute region to 8-byte boundary --legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to remove deprecated flags all linker files (GCC and IAR as well to have uniformity) should strictly align to 8-byte boundary --- .../TARGET_M2351/device/TOOLCHAIN_GCC_ARM/M2351.ld | 10 +++++----- .../TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld | 8 ++++---- .../TARGET_M480/device/TOOLCHAIN_GCC_ARM/M487.ld | 8 ++++---- .../TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/NANO130.ld | 8 ++++---- .../TARGET_NU_XRAM_SUPPORTED/NUC472.ld | 8 ++++---- .../TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld | 8 ++++---- 6 files changed, 25 insertions(+), 25 deletions(-) diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_GCC_ARM/M2351.ld b/targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_GCC_ARM/M2351.ld index 185e5fa42ef..6fa9f5a7185 100644 --- a/targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_GCC_ARM/M2351.ld +++ b/targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_GCC_ARM/M2351.ld @@ -132,7 +132,7 @@ SECTIONS { __vector_table = .; KEEP(*(.vector_table)) - . = ALIGN(4); + . = ALIGN(8); } > VECTORS /* ensure that uvisor bss is at the beginning of memory */ @@ -164,7 +164,7 @@ SECTIONS .text : { /* uVisor code and data */ - . = ALIGN(4); + . = ALIGN(8); __uvisor_main_start = .; *(.uvisor.main) __uvisor_main_end = .; @@ -253,20 +253,20 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld index 8c352b06e4d..39189a632f1 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld +++ b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld @@ -59,7 +59,7 @@ SECTIONS { __vector_table = .; KEEP(*(.vector_table)) - . = ALIGN(4); + . = ALIGN(8); } > VECTORS @@ -135,20 +135,20 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) diff --git a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_GCC_ARM/M487.ld b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_GCC_ARM/M487.ld index f7608e3fa37..22e8abf2173 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_GCC_ARM/M487.ld +++ b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_GCC_ARM/M487.ld @@ -61,7 +61,7 @@ SECTIONS { __vector_table = .; KEEP(*(.vector_table)) - . = ALIGN(4); + . = ALIGN(8); } > VECTORS @@ -138,20 +138,20 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/NANO130.ld b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/NANO130.ld index 431a878a974..6dd4a15dd17 100644 --- a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/NANO130.ld +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/NANO130.ld @@ -51,7 +51,7 @@ SECTIONS { __vector_table = .; KEEP(*(.vector_table)) - . = ALIGN(4); + . = ALIGN(8); } > VECTORS @@ -119,20 +119,20 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_SUPPORTED/NUC472.ld b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_SUPPORTED/NUC472.ld index 20ab8e552fa..14a75161da7 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_SUPPORTED/NUC472.ld +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_SUPPORTED/NUC472.ld @@ -60,7 +60,7 @@ SECTIONS { __vector_table = .; KEEP(*(.vector_table)) - . = ALIGN(4); + . = ALIGN(8); } > VECTORS @@ -137,20 +137,20 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld index a0944b2ad5a..5c9c3a0af61 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld @@ -59,7 +59,7 @@ SECTIONS { __vector_table = .; KEEP(*(.vector_table)) - . = ALIGN(4); + . = ALIGN(8); } > VECTORS @@ -137,20 +137,20 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) From 61404e62d882aac53afeb0b40de22119d787a927 Mon Sep 17 00:00:00 2001 From: Deepika Date: Wed, 19 Sep 2018 10:08:01 -0500 Subject: [PATCH 02/13] Nordic: Fix alignment of execute region to 8-byte boundary --legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to remove deprecated flags all linker files (GCC and IAR as well to have uniformity) should strictly align to 8-byte boundary --- .../TARGET_MCU_NORDIC_32K/NRF51822.ld | 12 +++++------ .../TARGET_MCU_NRF51_16K_S110/NRF51822.ld | 12 +++++------ .../TARGET_MCU_NRF51_16K_S130/NRF51822.ld | 12 +++++------ .../TARGET_MCU_NORDIC_32K/NRF51822.ld | 14 ++++++------- .../TARGET_MCU_NRF51_16K_S110/NRF51822.ld | 12 +++++------ .../TARGET_MCU_NRF51_16K_S130/NRF51822.ld | 14 ++++++------- .../device/TOOLCHAIN_ARM_STD/nRF52832.sct | 2 +- .../device/TOOLCHAIN_GCC_ARM/NRF52832.ld | 20 +++++++++---------- .../device/TOOLCHAIN_IAR/nRF52832.icf | 2 +- .../device/TOOLCHAIN_GCC_ARM/NRF52840.ld | 18 ++++++++--------- 10 files changed, 59 insertions(+), 59 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld index 913b2108474..41546f2c783 100644 --- a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld +++ b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld @@ -86,13 +86,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -100,7 +100,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -108,7 +108,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); *(.jcr) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -116,11 +116,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld index d0ed81d84e7..f4eaf88e05e 100644 --- a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld +++ b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld @@ -86,13 +86,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -100,7 +100,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -108,7 +108,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); *(.jcr) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -116,11 +116,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld index 237ab159854..e7b9ee53fed 100644 --- a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld +++ b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld @@ -86,13 +86,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -100,7 +100,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -108,7 +108,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); *(.jcr) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -116,11 +116,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld index c48425a1479..9ddce97f408 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld @@ -86,13 +86,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -100,20 +100,20 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE_HIDDEN (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); PROVIDE(__start_fs_data = .); KEEP(*(.fs_data)) PROVIDE(__stop_fs_data = .); *(.jcr) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -130,11 +130,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld index d0ed81d84e7..f4eaf88e05e 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld @@ -86,13 +86,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -100,7 +100,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -108,7 +108,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); *(.jcr) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -116,11 +116,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld index 2ee1bc865ec..1b520bdf01d 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld @@ -86,13 +86,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -100,20 +100,20 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE_HIDDEN (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); PROVIDE(__start_fs_data = .); KEEP(*(.fs_data)) PROVIDE(__stop_fs_data = .); *(.jcr) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -128,11 +128,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct index d9d270be290..2db7508c19e 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct @@ -21,7 +21,7 @@ #endif #define MBED_RAM0_START MBED_RAM_START -#define MBED_RAM0_SIZE 0xDC +#define MBED_RAM0_SIZE 0xE0 #define MBED_RAM1_START (MBED_RAM_START + MBED_RAM0_SIZE) #define MBED_RAM1_SIZE (MBED_RAM_SIZE - MBED_RAM0_SIZE) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld index b793baf3c9b..e30c4f2121f 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld @@ -37,7 +37,7 @@ #endif #define MBED_RAM0_START MBED_RAM_START -#define MBED_RAM0_SIZE 0xDC +#define MBED_RAM0_SIZE 0xE0 #define MBED_RAM1_START (MBED_RAM_START + MBED_RAM0_SIZE) #define MBED_RAM1_SIZE (MBED_RAM_SIZE - MBED_RAM0_SIZE) @@ -147,14 +147,14 @@ SECTIONS .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) - . = ALIGN(4); + . = ALIGN(8); } > FLASH __exidx_start = .; .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) - . = ALIGN(4); + . = ALIGN(8); } > FLASH __exidx_end = .; @@ -166,13 +166,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -180,20 +180,20 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE_HIDDEN (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); PROVIDE(__start_fs_data = .); KEEP(*(.fs_data)) PROVIDE(__stop_fs_data = .); *(.jcr) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -217,11 +217,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf index 03789113c1e..714b59a9e86 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf @@ -23,7 +23,7 @@ if (!isdefinedsymbol(MBED_RAM_START)) { } define symbol MBED_RAM0_START = MBED_RAM_START; -define symbol MBED_RAM0_SIZE = 0xDC; +define symbol MBED_RAM0_SIZE = 0xE0; /* 8-byte aligned(0xDC) = 0xE0 */ define symbol MBED_RAM1_START = (MBED_RAM_START + MBED_RAM0_SIZE); define symbol MBED_RAM1_SIZE = (MBED_RAM_SIZE - MBED_RAM0_SIZE); diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld index f496331aa35..66b96eb3fb1 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld @@ -146,14 +146,14 @@ SECTIONS .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) - . = ALIGN(4); + . = ALIGN(8); } > FLASH __exidx_start = .; .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) - . = ALIGN(4); + . = ALIGN(8); } > FLASH __exidx_end = .; @@ -165,13 +165,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -179,20 +179,20 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE_HIDDEN (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); PROVIDE(__start_fs_data = .); KEEP(*(.fs_data)) PROVIDE(__stop_fs_data = .); *(.jcr) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -216,11 +216,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM From 8c17ff6168ba03f5efb5774b82907e8a8cc49ae5 Mon Sep 17 00:00:00 2001 From: Deepika Date: Wed, 19 Sep 2018 10:08:43 -0500 Subject: [PATCH 03/13] Toshiba: Fix alignment of execute region to 8-byte boundary --legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to remove deprecated flags all linker files (GCC and IAR as well to have uniformity) should strictly align to 8-byte boundary --- .../device/TOOLCHAIN_GCC_ARM/tmpm066fwug.ld | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/tmpm3h6fwfg.ld | 12 ++++++------ .../device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld | 16 ++++++++-------- 3 files changed, 18 insertions(+), 18 deletions(-) diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_GCC_ARM/tmpm066fwug.ld b/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_GCC_ARM/tmpm066fwug.ld index 8b0048a290b..6d5243259c7 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_GCC_ARM/tmpm066fwug.ld +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_GCC_ARM/tmpm066fwug.ld @@ -85,13 +85,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -99,14 +99,14 @@ SECTIONS PROVIDE (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_GCC_ARM/tmpm3h6fwfg.ld b/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_GCC_ARM/tmpm3h6fwfg.ld index c43ce8b3f66..e9896929678 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_GCC_ARM/tmpm3h6fwfg.ld +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_GCC_ARM/tmpm3h6fwfg.ld @@ -96,13 +96,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -110,7 +110,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -118,7 +118,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -126,11 +126,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld index d89b6e94f5e..9f9d4ad6ca6 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld @@ -105,7 +105,7 @@ SECTIONS /* .copy.table : { - . = ALIGN(4); + . = ALIGN(8); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) @@ -123,7 +123,7 @@ SECTIONS /* .zero.table : { - . = ALIGN(4); + . = ALIGN(8); __zero_table_start__ = .; LONG (__bss_start__) LONG (__bss_end__ - __bss_start__) @@ -141,13 +141,13 @@ SECTIONS *(vtable) *(.data*) *(.ram_func*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -155,7 +155,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -163,7 +163,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -171,11 +171,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM From 5a25fd9ff3e6e5c43d02e4a0a5dc0308b75b4686 Mon Sep 17 00:00:00 2001 From: Deepika Date: Wed, 19 Sep 2018 10:10:25 -0500 Subject: [PATCH 04/13] Atmel: Fix alignment of execute region to 8-byte boundary --legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to remove deprecated flags all linker files (GCC and IAR as well to have uniformity) should strictly align to 8-byte boundary --- .../device/TOOLCHAIN_ARM_MICRO/SAMD21G18A.sct | 4 +-- .../device/TOOLCHAIN_ARM_STD/SAMD21G18A.sct | 4 +-- .../device/TOOLCHAIN_GCC_ARM/samd21g18a.ld | 32 +++++++++---------- .../device/TOOLCHAIN_ARM_MICRO/SAMD21J18A.sct | 4 +-- .../device/TOOLCHAIN_ARM_STD/SAMD21J18A.sct | 4 +-- .../device/TOOLCHAIN_GCC_ARM/samd21j18a.ld | 32 +++++++++---------- .../device/TOOLCHAIN_ARM_MICRO/SAML21J18A.sct | 4 +-- .../device/TOOLCHAIN_ARM_STD/SAML21J18A.sct | 4 +-- .../device/TOOLCHAIN_GCC_ARM/saml21j18a.ld | 32 +++++++++---------- .../device/TOOLCHAIN_GCC_ARM/samr21g18a.ld | 30 ++++++++--------- .../device/TOOLCHAIN_GCC_ARM/samg55j19.ld | 30 ++++++++--------- 11 files changed, 90 insertions(+), 90 deletions(-) diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_MICRO/SAMD21G18A.sct b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_MICRO/SAMD21G18A.sct index ae0aa0031d3..7fda6ed3980 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_MICRO/SAMD21G18A.sct +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_MICRO/SAMD21G18A.sct @@ -11,8 +11,8 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region .ANY (+RO) } - ; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4) - alignment - RW_IRAM1 (0x20000000+0xB4) (0x8000-0xB4) { ; RW data + ; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4+0x4) 8-byte alignment + RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) { ; RW data .ANY (+RW +ZI) } diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_STD/SAMD21G18A.sct b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_STD/SAMD21G18A.sct index ae0aa0031d3..7fda6ed3980 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_STD/SAMD21G18A.sct +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_STD/SAMD21G18A.sct @@ -11,8 +11,8 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region .ANY (+RO) } - ; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4) - alignment - RW_IRAM1 (0x20000000+0xB4) (0x8000-0xB4) { ; RW data + ; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4+0x4) 8-byte alignment + RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) { ; RW data .ANY (+RW +ZI) } diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_GCC_ARM/samd21g18a.ld b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_GCC_ARM/samd21g18a.ld index b8c2983cd65..21334d715a5 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_GCC_ARM/samd21g18a.ld +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_GCC_ARM/samd21g18a.ld @@ -5,7 +5,7 @@ SEARCH_DIR(.) /* Memory Spaces Definitions */ MEMORY { rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 - ram (rwx) : ORIGIN = 0x20000000 + 0xB4, LENGTH = 0x00008000 - 0xB4 + ram (rwx) : ORIGIN = 0x20000000 + 0xB8, LENGTH = 0x00008000 - 0xB8 } /* The stack size used by the application. NOTE: you need to adjust according to your application. */ @@ -15,7 +15,7 @@ MEMORY { SECTIONS { .text : { - . = ALIGN(4); + . = ALIGN(8); _sfixed = .; KEEP(*(.vectors .vectors.*)) *(.text .text.* .gnu.linkonce.t.*) @@ -25,29 +25,29 @@ MEMORY { /* Support C constructors, and C destructors in both user code and the C library. This also provides support for C++ code. */ - . = ALIGN(4); + . = ALIGN(8); KEEP(*(.init)) - . = ALIGN(4); + . = ALIGN(8); __preinit_array_start = .; KEEP (*(.preinit_array)) __preinit_array_end = .; - . = ALIGN(4); + . = ALIGN(8); __init_array_start = .; KEEP (*(SORT(.init_array.*))) KEEP (*(.init_array)) __init_array_end = .; - . = ALIGN(4); + . = ALIGN(8); KEEP (*crtbegin.o(.ctors)) KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*crtend.o(.ctors)) - . = ALIGN(4); + . = ALIGN(8); KEEP(*(.fini)) - . = ALIGN(4); + . = ALIGN(8); __fini_array_start = .; KEEP (*(.fini_array)) KEEP (*(SORT(.fini_array.*))) @@ -58,7 +58,7 @@ MEMORY { KEEP (*(SORT(.dtors.*))) KEEP (*crtend.o(.dtors)) - . = ALIGN(4); + . = ALIGN(8); _efixed = .; /* End of text section */ } > rom @@ -70,36 +70,36 @@ MEMORY { } > rom PROVIDE_HIDDEN (__exidx_end = .); - . = ALIGN(4); + . = ALIGN(8); _etext = .; .relocate : AT (_etext) { - . = ALIGN(4); + . = ALIGN(8); _srelocate = .; *(.ramfunc .ramfunc.*); *(.data .data.*); - . = ALIGN(4); + . = ALIGN(8); _erelocate = .; } > ram /* .bss section which is used for uninitialized data */ .bss (NOLOAD) : { - . = ALIGN(4); + . = ALIGN(8); _sbss = . ; _szero = .; *(.bss .bss.*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); _ebss = . ; _ezero = .; } > ram .heap (NOLOAD) : { - . = ALIGN(4); + . = ALIGN(8); __end__ = . ; . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; } > ram @@ -114,5 +114,5 @@ MEMORY { _estack = .; } > ram - . = ALIGN(4); + . = ALIGN(8); } diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_MICRO/SAMD21J18A.sct b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_MICRO/SAMD21J18A.sct index 2fa9c77d269..0d7409619f7 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_MICRO/SAMD21J18A.sct +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_MICRO/SAMD21J18A.sct @@ -11,8 +11,8 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region .ANY (+RO) } - ; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4) - alignment - RW_IRAM1 (0x20000000+0xB4) (0x8000-0xB4) { ; RW data + ; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4 +0x4) 8-byte alignment + RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) { ; RW data .ANY (+RW +ZI) } diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_STD/SAMD21J18A.sct b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_STD/SAMD21J18A.sct index 2fa9c77d269..49ff53cda2c 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_STD/SAMD21J18A.sct +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_STD/SAMD21J18A.sct @@ -11,8 +11,8 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region .ANY (+RO) } - ; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4) - alignment - RW_IRAM1 (0x20000000+0xB4) (0x8000-0xB4) { ; RW data + ; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4+0x4) 8-byte alignment + RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) { ; RW data .ANY (+RW +ZI) } diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_GCC_ARM/samd21j18a.ld b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_GCC_ARM/samd21j18a.ld index b8c2983cd65..21334d715a5 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_GCC_ARM/samd21j18a.ld +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_GCC_ARM/samd21j18a.ld @@ -5,7 +5,7 @@ SEARCH_DIR(.) /* Memory Spaces Definitions */ MEMORY { rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 - ram (rwx) : ORIGIN = 0x20000000 + 0xB4, LENGTH = 0x00008000 - 0xB4 + ram (rwx) : ORIGIN = 0x20000000 + 0xB8, LENGTH = 0x00008000 - 0xB8 } /* The stack size used by the application. NOTE: you need to adjust according to your application. */ @@ -15,7 +15,7 @@ MEMORY { SECTIONS { .text : { - . = ALIGN(4); + . = ALIGN(8); _sfixed = .; KEEP(*(.vectors .vectors.*)) *(.text .text.* .gnu.linkonce.t.*) @@ -25,29 +25,29 @@ MEMORY { /* Support C constructors, and C destructors in both user code and the C library. This also provides support for C++ code. */ - . = ALIGN(4); + . = ALIGN(8); KEEP(*(.init)) - . = ALIGN(4); + . = ALIGN(8); __preinit_array_start = .; KEEP (*(.preinit_array)) __preinit_array_end = .; - . = ALIGN(4); + . = ALIGN(8); __init_array_start = .; KEEP (*(SORT(.init_array.*))) KEEP (*(.init_array)) __init_array_end = .; - . = ALIGN(4); + . = ALIGN(8); KEEP (*crtbegin.o(.ctors)) KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*crtend.o(.ctors)) - . = ALIGN(4); + . = ALIGN(8); KEEP(*(.fini)) - . = ALIGN(4); + . = ALIGN(8); __fini_array_start = .; KEEP (*(.fini_array)) KEEP (*(SORT(.fini_array.*))) @@ -58,7 +58,7 @@ MEMORY { KEEP (*(SORT(.dtors.*))) KEEP (*crtend.o(.dtors)) - . = ALIGN(4); + . = ALIGN(8); _efixed = .; /* End of text section */ } > rom @@ -70,36 +70,36 @@ MEMORY { } > rom PROVIDE_HIDDEN (__exidx_end = .); - . = ALIGN(4); + . = ALIGN(8); _etext = .; .relocate : AT (_etext) { - . = ALIGN(4); + . = ALIGN(8); _srelocate = .; *(.ramfunc .ramfunc.*); *(.data .data.*); - . = ALIGN(4); + . = ALIGN(8); _erelocate = .; } > ram /* .bss section which is used for uninitialized data */ .bss (NOLOAD) : { - . = ALIGN(4); + . = ALIGN(8); _sbss = . ; _szero = .; *(.bss .bss.*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); _ebss = . ; _ezero = .; } > ram .heap (NOLOAD) : { - . = ALIGN(4); + . = ALIGN(8); __end__ = . ; . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; } > ram @@ -114,5 +114,5 @@ MEMORY { _estack = .; } > ram - . = ALIGN(4); + . = ALIGN(8); } diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_MICRO/SAML21J18A.sct b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_MICRO/SAML21J18A.sct index eb079ebbc0d..f1f0bb48f6b 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_MICRO/SAML21J18A.sct +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_MICRO/SAML21J18A.sct @@ -18,8 +18,8 @@ LR_IROM1 0x00000000 0x40000 { ; } ; - [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4) - alignment - RW_IRAM1 (0x20000000+0xB4) (0x8000-0xB4) + [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4+0x4) 8-byte alignment + RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) { ; RW data diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_STD/SAML21J18A.sct b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_STD/SAML21J18A.sct index d9fd77fbbf6..86cae7a5172 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_STD/SAML21J18A.sct +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_STD/SAML21J18A.sct @@ -10,8 +10,8 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region .ANY (+RO) } - ; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4) - alignment - RW_IRAM1 (0x20000000+0xB4) (0x8000-0xB4) { ; RW data + ; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4+0x4) 8-byte alignment + RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) { ; RW data .ANY (+RW +ZI) } } diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_GCC_ARM/saml21j18a.ld b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_GCC_ARM/saml21j18a.ld index b8c2983cd65..21334d715a5 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_GCC_ARM/saml21j18a.ld +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_GCC_ARM/saml21j18a.ld @@ -5,7 +5,7 @@ SEARCH_DIR(.) /* Memory Spaces Definitions */ MEMORY { rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 - ram (rwx) : ORIGIN = 0x20000000 + 0xB4, LENGTH = 0x00008000 - 0xB4 + ram (rwx) : ORIGIN = 0x20000000 + 0xB8, LENGTH = 0x00008000 - 0xB8 } /* The stack size used by the application. NOTE: you need to adjust according to your application. */ @@ -15,7 +15,7 @@ MEMORY { SECTIONS { .text : { - . = ALIGN(4); + . = ALIGN(8); _sfixed = .; KEEP(*(.vectors .vectors.*)) *(.text .text.* .gnu.linkonce.t.*) @@ -25,29 +25,29 @@ MEMORY { /* Support C constructors, and C destructors in both user code and the C library. This also provides support for C++ code. */ - . = ALIGN(4); + . = ALIGN(8); KEEP(*(.init)) - . = ALIGN(4); + . = ALIGN(8); __preinit_array_start = .; KEEP (*(.preinit_array)) __preinit_array_end = .; - . = ALIGN(4); + . = ALIGN(8); __init_array_start = .; KEEP (*(SORT(.init_array.*))) KEEP (*(.init_array)) __init_array_end = .; - . = ALIGN(4); + . = ALIGN(8); KEEP (*crtbegin.o(.ctors)) KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*crtend.o(.ctors)) - . = ALIGN(4); + . = ALIGN(8); KEEP(*(.fini)) - . = ALIGN(4); + . = ALIGN(8); __fini_array_start = .; KEEP (*(.fini_array)) KEEP (*(SORT(.fini_array.*))) @@ -58,7 +58,7 @@ MEMORY { KEEP (*(SORT(.dtors.*))) KEEP (*crtend.o(.dtors)) - . = ALIGN(4); + . = ALIGN(8); _efixed = .; /* End of text section */ } > rom @@ -70,36 +70,36 @@ MEMORY { } > rom PROVIDE_HIDDEN (__exidx_end = .); - . = ALIGN(4); + . = ALIGN(8); _etext = .; .relocate : AT (_etext) { - . = ALIGN(4); + . = ALIGN(8); _srelocate = .; *(.ramfunc .ramfunc.*); *(.data .data.*); - . = ALIGN(4); + . = ALIGN(8); _erelocate = .; } > ram /* .bss section which is used for uninitialized data */ .bss (NOLOAD) : { - . = ALIGN(4); + . = ALIGN(8); _sbss = . ; _szero = .; *(.bss .bss.*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); _ebss = . ; _ezero = .; } > ram .heap (NOLOAD) : { - . = ALIGN(4); + . = ALIGN(8); __end__ = . ; . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; } > ram @@ -114,5 +114,5 @@ MEMORY { _estack = .; } > ram - . = ALIGN(4); + . = ALIGN(8); } diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_GCC_ARM/samr21g18a.ld b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_GCC_ARM/samr21g18a.ld index 21479a889e0..f060f236f6e 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_GCC_ARM/samr21g18a.ld +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_GCC_ARM/samr21g18a.ld @@ -15,7 +15,7 @@ MEMORY { SECTIONS { .text : { - . = ALIGN(4); + . = ALIGN(8); _sfixed = .; KEEP(*(.vectors .vectors.*)) *(.text .text.* .gnu.linkonce.t.*) @@ -25,29 +25,29 @@ MEMORY { /* Support C constructors, and C destructors in both user code and the C library. This also provides support for C++ code. */ - . = ALIGN(4); + . = ALIGN(8); KEEP(*(.init)) - . = ALIGN(4); + . = ALIGN(8); __preinit_array_start = .; KEEP (*(.preinit_array)) __preinit_array_end = .; - . = ALIGN(4); + . = ALIGN(8); __init_array_start = .; KEEP (*(SORT(.init_array.*))) KEEP (*(.init_array)) __init_array_end = .; - . = ALIGN(4); + . = ALIGN(8); KEEP (*crtbegin.o(.ctors)) KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*crtend.o(.ctors)) - . = ALIGN(4); + . = ALIGN(8); KEEP(*(.fini)) - . = ALIGN(4); + . = ALIGN(8); __fini_array_start = .; KEEP (*(.fini_array)) KEEP (*(SORT(.fini_array.*))) @@ -58,7 +58,7 @@ MEMORY { KEEP (*(SORT(.dtors.*))) KEEP (*crtend.o(.dtors)) - . = ALIGN(4); + . = ALIGN(8); _efixed = .; /* End of text section */ } > rom @@ -70,36 +70,36 @@ MEMORY { } > rom PROVIDE_HIDDEN (__exidx_end = .); - . = ALIGN(4); + . = ALIGN(8); _etext = .; .relocate : AT (_etext) { - . = ALIGN(4); + . = ALIGN(8); _srelocate = .; *(.ramfunc .ramfunc.*); *(.data .data.*); - . = ALIGN(4); + . = ALIGN(8); _erelocate = .; } > ram /* .bss section which is used for uninitialized data */ .bss (NOLOAD) : { - . = ALIGN(4); + . = ALIGN(8); _sbss = . ; _szero = .; *(.bss .bss.*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); _ebss = . ; _ezero = .; } > ram .heap (NOLOAD) : { - . = ALIGN(4); + . = ALIGN(8); __end__ = . ; . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; } > ram @@ -114,5 +114,5 @@ MEMORY { _estack = .; } > ram - . = ALIGN(4); + . = ALIGN(8); } diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM4/TARGET_SAMG55J19/device/TOOLCHAIN_GCC_ARM/samg55j19.ld b/targets/TARGET_Atmel/TARGET_SAM_CortexM4/TARGET_SAMG55J19/device/TOOLCHAIN_GCC_ARM/samg55j19.ld index ff2da412b75..e3e802d7149 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM4/TARGET_SAMG55J19/device/TOOLCHAIN_GCC_ARM/samg55j19.ld +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM4/TARGET_SAMG55J19/device/TOOLCHAIN_GCC_ARM/samg55j19.ld @@ -15,7 +15,7 @@ MEMORY { SECTIONS { .text : { - . = ALIGN(4); + . = ALIGN(8); _sfixed = .; KEEP(*(.vectors .vectors.*)) *(.text .text.* .gnu.linkonce.t.*) @@ -25,29 +25,29 @@ MEMORY { /* Support C constructors, and C destructors in both user code and the C library. This also provides support for C++ code. */ - . = ALIGN(4); + . = ALIGN(8); KEEP(*(.init)) - . = ALIGN(4); + . = ALIGN(8); __preinit_array_start = .; KEEP (*(.preinit_array)) __preinit_array_end = .; - . = ALIGN(4); + . = ALIGN(8); __init_array_start = .; KEEP (*(SORT(.init_array.*))) KEEP (*(.init_array)) __init_array_end = .; - . = ALIGN(4); + . = ALIGN(8); KEEP (*crtbegin.o(.ctors)) KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*crtend.o(.ctors)) - . = ALIGN(4); + . = ALIGN(8); KEEP(*(.fini)) - . = ALIGN(4); + . = ALIGN(8); __fini_array_start = .; KEEP (*(.fini_array)) KEEP (*(SORT(.fini_array.*))) @@ -58,7 +58,7 @@ MEMORY { KEEP (*(SORT(.dtors.*))) KEEP (*crtend.o(.dtors)) - . = ALIGN(4); + . = ALIGN(8); _efixed = .; /* End of text section */ } > rom @@ -70,36 +70,36 @@ MEMORY { } > rom PROVIDE_HIDDEN (__exidx_end = .); - . = ALIGN(4); + . = ALIGN(8); _etext = .; .relocate : AT (_etext) { - . = ALIGN(4); + . = ALIGN(8); _srelocate = .; *(.ramfunc .ramfunc.*); *(.data .data.*); - . = ALIGN(4); + . = ALIGN(8); _erelocate = .; } > ram /* .bss section which is used for uninitialized data */ .bss (NOLOAD) : { - . = ALIGN(4); + . = ALIGN(8); _sbss = . ; _szero = .; *(.bss .bss.*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); _ebss = . ; _ezero = .; } > ram .heap (NOLOAD) : { - . = ALIGN(4); + . = ALIGN(8); __end__ = . ; . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; } > ram @@ -114,5 +114,5 @@ MEMORY { _estack = .; } > ram - . = ALIGN(4); + . = ALIGN(8); } From a6997ab97068bbd1d8dc0f6f461c3ee9579206de Mon Sep 17 00:00:00 2001 From: Deepika Date: Wed, 19 Sep 2018 10:11:29 -0500 Subject: [PATCH 05/13] Maxim: Fix alignment of execute region to 8-byte boundary --legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to remove deprecated flags all linker files (GCC and IAR as well to have uniformity) should strictly align to 8-byte boundary --- .../TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld | 8 ++++---- .../TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld | 8 ++++---- .../TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld | 8 ++++---- .../TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld | 8 ++++---- .../TOOLCHAIN_GCC_ARM/TARGET_MAX32625NEXPAQ/max32625.ld | 8 ++++---- .../TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld | 8 ++++---- .../TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld | 8 ++++---- .../TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld | 8 ++++---- 8 files changed, 32 insertions(+), 32 deletions(-) diff --git a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld index 2d5c3112e59..cb845f7914f 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld @@ -120,13 +120,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -134,14 +134,14 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE_HIDDEN (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; diff --git a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld index be14fd10a7f..ab9d1cedf2a 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld @@ -120,13 +120,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -134,14 +134,14 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE_HIDDEN (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; diff --git a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld index 44528cda5b7..3f5d5adb5ab 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld @@ -114,13 +114,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -128,14 +128,14 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE_HIDDEN (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; diff --git a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld index 44528cda5b7..3f5d5adb5ab 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld @@ -114,13 +114,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -128,14 +128,14 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE_HIDDEN (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625NEXPAQ/max32625.ld b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625NEXPAQ/max32625.ld index f51f007f1ad..76103a93d99 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625NEXPAQ/max32625.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625NEXPAQ/max32625.ld @@ -114,13 +114,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -128,14 +128,14 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE_HIDDEN (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld index dee71737a85..203cefb267a 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld @@ -122,13 +122,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -136,14 +136,14 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE_HIDDEN (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld index e709485e1e1..23d0c57e346 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld @@ -114,13 +114,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -128,14 +128,14 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE_HIDDEN (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld index b3db5d6ce60..dbf74c33585 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld @@ -114,13 +114,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -128,14 +128,14 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE_HIDDEN (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; From 2a8ae84cb193c78889070b65995b7f5dd7003e06 Mon Sep 17 00:00:00 2001 From: Deepika Date: Wed, 19 Sep 2018 10:12:51 -0500 Subject: [PATCH 06/13] ARM: Fix alignment of execute region to 8-byte boundary --legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to remove deprecated flags all linker files (GCC and IAR as well to have uniformity) should strictly align to 8-byte boundary --- .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 22 +++++++++---------- .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 22 +++++++++---------- .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 22 +++++++++---------- .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 22 +++++++++---------- .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 22 +++++++++---------- .../device/TOOLCHAIN_GCC_ARM/BEETLE.ld | 20 ++++++++--------- .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 22 +++++++++---------- 7 files changed, 76 insertions(+), 76 deletions(-) diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 20097e1c126..f50b4d56294 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -77,12 +77,12 @@ SECTIONS { __vector_table = .; KEEP(*(.vector_table)) - . = ALIGN(4); + . = ALIGN(8); } > VECTORS .text : { - . = ALIGN(4); + . = ALIGN(8); *(.text*) KEEP(*(.init)) @@ -121,30 +121,30 @@ SECTIONS .interrupts_ram : { - . = ALIGN(4); + . = ALIGN(8); __VECTOR_RAM__ = .; __interrupts_ram_start__ = .; /* Create a global symbol at data start */ . += M_VECTOR_RAM_SIZE; - . = ALIGN(4); + . = ALIGN(8); __interrupts_ram_end__ = .; /* Define a global symbol at data end */ } > RAM .data : { PROVIDE(__etext = LOADADDR(.data)); - . = ALIGN(4); + . = ALIGN(8); __data_start__ = .; *(vtable) *(.data) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -152,14 +152,14 @@ SECTIONS PROVIDE (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -177,13 +177,13 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __START_BSS = .; __bss_start__ = .; *(.bss) *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; __END_BSS = .; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 647cc848eac..7e2c8bdf3e9 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -77,12 +77,12 @@ SECTIONS { __vector_table = .; KEEP(*(.vector_table)) - . = ALIGN(4); + . = ALIGN(8); } > VECTORS .text : { - . = ALIGN(4); + . = ALIGN(8); *(.text*) KEEP(*(.init)) @@ -121,30 +121,30 @@ SECTIONS .interrupts_ram : { - . = ALIGN(4); + . = ALIGN(8); __VECTOR_RAM__ = .; __interrupts_ram_start__ = .; /* Create a global symbol at data start */ . += M_VECTOR_RAM_SIZE; - . = ALIGN(4); + . = ALIGN(8); __interrupts_ram_end__ = .; /* Define a global symbol at data end */ } > RAM .data : { PROVIDE(__etext = LOADADDR(.data)); - . = ALIGN(4); + . = ALIGN(8); __data_start__ = .; *(vtable) *(.data) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -152,14 +152,14 @@ SECTIONS PROVIDE (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -177,13 +177,13 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __START_BSS = .; __bss_start__ = .; *(.bss) *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; __END_BSS = .; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld index dc784fcae49..af52d7fe129 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -77,12 +77,12 @@ SECTIONS { __vector_table = .; KEEP(*(.vector_table)) - . = ALIGN(4); + . = ALIGN(8); } > VECTORS .text : { - . = ALIGN(4); + . = ALIGN(8); *(.text*) KEEP(*(.init)) @@ -121,30 +121,30 @@ SECTIONS .interrupts_ram : { - . = ALIGN(4); + . = ALIGN(8); __VECTOR_RAM__ = .; __interrupts_ram_start__ = .; /* Create a global symbol at data start */ . += M_VECTOR_RAM_SIZE; - . = ALIGN(4); + . = ALIGN(8); __interrupts_ram_end__ = .; /* Define a global symbol at data end */ } > RAM .data : { PROVIDE(__etext = LOADADDR(.data)); - . = ALIGN(4); + . = ALIGN(8); __data_start__ = .; *(vtable) *(.data) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -152,14 +152,14 @@ SECTIONS PROVIDE (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -177,13 +177,13 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __START_BSS = .; __bss_start__ = .; *(.bss) *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; __END_BSS = .; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 31e576bf98b..23435e3167b 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -77,12 +77,12 @@ SECTIONS { __vector_table = .; KEEP(*(.vector_table)) - . = ALIGN(4); + . = ALIGN(8); } > VECTORS .text : { - . = ALIGN(4); + . = ALIGN(8); *(.text*) KEEP(*(.init)) @@ -121,30 +121,30 @@ SECTIONS .interrupts_ram : { - . = ALIGN(4); + . = ALIGN(8); __VECTOR_RAM__ = .; __interrupts_ram_start__ = .; /* Create a global symbol at data start */ . += M_VECTOR_RAM_SIZE; - . = ALIGN(4); + . = ALIGN(8); __interrupts_ram_end__ = .; /* Define a global symbol at data end */ } > RAM .data : { PROVIDE(__etext = LOADADDR(.data)); - . = ALIGN(4); + . = ALIGN(8); __data_start__ = .; *(vtable) *(.data) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -152,14 +152,14 @@ SECTIONS PROVIDE (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -177,13 +177,13 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __START_BSS = .; __bss_start__ = .; *(.bss) *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; __END_BSS = .; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld index df16163d488..8e065ba4134 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -77,12 +77,12 @@ SECTIONS { __vector_table = .; KEEP(*(.vector_table)) - . = ALIGN(4); + . = ALIGN(8); } > VECTORS .text : { - . = ALIGN(4); + . = ALIGN(8); *(.text*) KEEP(*(.init)) @@ -121,30 +121,30 @@ SECTIONS .interrupts_ram : { - . = ALIGN(4); + . = ALIGN(8); __VECTOR_RAM__ = .; __interrupts_ram_start__ = .; /* Create a global symbol at data start */ . += M_VECTOR_RAM_SIZE; - . = ALIGN(4); + . = ALIGN(8); __interrupts_ram_end__ = .; /* Define a global symbol at data end */ } > RAM .data : { PROVIDE(__etext = LOADADDR(.data)); - . = ALIGN(4); + . = ALIGN(8); __data_start__ = .; *(vtable) *(.data) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -152,14 +152,14 @@ SECTIONS PROVIDE (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -177,13 +177,13 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __START_BSS = .; __bss_start__ = .; *(.bss) *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; __END_BSS = .; diff --git a/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_GCC_ARM/BEETLE.ld b/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_GCC_ARM/BEETLE.ld index 5dd39c76d00..176804cb47c 100644 --- a/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_GCC_ARM/BEETLE.ld +++ b/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_GCC_ARM/BEETLE.ld @@ -75,7 +75,7 @@ SECTIONS { __vector_table = .; KEEP(*(.vector_table)) - . = ALIGN(4); + . = ALIGN(8); } > VECTORS .text : @@ -124,30 +124,30 @@ SECTIONS .interrupts_ram : { - . = ALIGN(4); + . = ALIGN(8); __VECTOR_RAM__ = .; __interrupts_ram_start__ = .; /* Create a global symbol at data start */ . += M_VECTOR_RAM_SIZE; - . = ALIGN(4); + . = ALIGN(8); __interrupts_ram_end__ = .; /* Define a global symbol at data end */ } > RAM .data : { PROVIDE(__etext = LOADADDR(.data)); - . = ALIGN(4); + . = ALIGN(8); __data_start__ = .; *(vtable) *(.data) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -155,14 +155,14 @@ SECTIONS PROVIDE (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -182,13 +182,13 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __START_BSS = .; __bss_start__ = .; *(.bss) *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; __END_BSS = .; diff --git a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_GCC_ARM/MPS2.ld index c0cc2f68bef..0fc60f65941 100644 --- a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -72,12 +72,12 @@ SECTIONS { __vector_table = .; KEEP(*(.vector_table)) - . = ALIGN(4); + . = ALIGN(8); } > VECTORS .text : { - . = ALIGN(4); + . = ALIGN(8); *(.text*) KEEP(*(.init)) @@ -116,30 +116,30 @@ SECTIONS .interrupts_ram : { - . = ALIGN(4); + . = ALIGN(8); __VECTOR_RAM__ = .; __interrupts_ram_start__ = .; /* Create a global symbol at data start */ . += M_VECTOR_RAM_SIZE; - . = ALIGN(4); + . = ALIGN(8); __interrupts_ram_end__ = .; /* Define a global symbol at data end */ } > RAM .data : { PROVIDE(__etext = LOADADDR(.data)); - . = ALIGN(4); + . = ALIGN(8); __data_start__ = .; *(vtable) *(.data) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -147,14 +147,14 @@ SECTIONS PROVIDE (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -172,13 +172,13 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __START_BSS = .; __bss_start__ = .; *(.bss) *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; __END_BSS = .; From d120222b6cc3e3e4552109a84ccb6cb49abe321f Mon Sep 17 00:00:00 2001 From: Deepika Date: Wed, 19 Sep 2018 10:13:11 -0500 Subject: [PATCH 07/13] Renesas: Fix alignment of execute region to 8-byte boundary --legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to remove deprecated flags all linker files (GCC and IAR as well to have uniformity) should strictly align to 8-byte boundary --- .../device/TOOLCHAIN_ARM_STD/MBRZA1LU.sct | 2 +- .../device/TOOLCHAIN_GCC_ARM/RZA1LU.ld | 20 +++++++++---------- .../device/TOOLCHAIN_ARM_STD/MBRZA1H.sct | 2 +- .../device/TOOLCHAIN_GCC_ARM/RZA1H.ld | 20 +++++++++---------- .../device/TOOLCHAIN_GCC_ARM/VKRZA1H.ld | 16 +++++++-------- 5 files changed, 30 insertions(+), 30 deletions(-) diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_ARM_STD/MBRZA1LU.sct b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_ARM_STD/MBRZA1LU.sct index 1b44ff564b7..00281740642 100644 --- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_ARM_STD/MBRZA1LU.sct +++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_ARM_STD/MBRZA1LU.sct @@ -52,7 +52,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE ; load region size_region RAM_CODE 0x20020000 { * (RAM_CODE) } ; Application RAM_CODE - RW_DATA +0 ALIGN 0x4 + RW_DATA +0 ALIGN 0x8 { * (+RW) } ; Application RW data (.data) RW_IRAM1 +0 ALIGN 0x10 diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_GCC_ARM/RZA1LU.ld b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_GCC_ARM/RZA1LU.ld index e27299d2a07..d47fa6f6901 100644 --- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_GCC_ARM/RZA1LU.ld +++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_GCC_ARM/RZA1LU.ld @@ -117,7 +117,7 @@ SECTIONS .copy.table : { - . = ALIGN(4); + . = ALIGN(8); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) @@ -133,7 +133,7 @@ SECTIONS .zero.table : { - . = ALIGN(4); + . = ALIGN(8); __zero_table_start__ = .; LONG (__bss_start__) LONG (__bss_end__ - __bss_start__) @@ -142,7 +142,7 @@ SECTIONS __zero_table_end__ = .; } > SFLASH - .ram_code : ALIGN( 0x4 ) { + .ram_code : ALIGN( 0x8 ) { __ram_code_load = .; __ram_code_start = LOADADDR(.ram_code) + ( __ram_code_load - ADDR(.ram_code) ); @@ -150,7 +150,7 @@ SECTIONS *(RAM_CONST) - . = ALIGN( 0x4 ); + . = ALIGN( 0x8 ); __ram_code_end = LOADADDR(.ram_code) + ( . - ADDR(.ram_code) ); } > RAM AT > SFLASH @@ -175,13 +175,13 @@ SECTIONS *(.data*) Image$$RW_DATA$$Limit = .; - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -189,14 +189,14 @@ SECTIONS PROVIDE (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -245,7 +245,7 @@ SECTIONS __nc_data_start = .; *(NC_DATA) - . = ALIGN(4); + . = ALIGN(8); __nc_data_end = .; Image$$RW_DATA_NC$$Limit = .; } > RAM_NC @@ -256,7 +256,7 @@ SECTIONS __nc_bss_start = .; *(NC_BSS) - . = ALIGN(4); + . = ALIGN(8); __nc_bss_end = .; Image$$ZI_DATA_NC$$Limit = .; } > RAM_NC diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_ARM_STD/MBRZA1H.sct b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_ARM_STD/MBRZA1H.sct index b429f79cc7a..67c8d588018 100644 --- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_ARM_STD/MBRZA1H.sct +++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_ARM_STD/MBRZA1H.sct @@ -52,7 +52,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE ; load region size_region RAM_CODE 0x20020000 { * (RAM_CODE) } ; Application RAM_CODE - RW_DATA +0 ALIGN 0x4 + RW_DATA +0 ALIGN 0x8 { * (+RW) } ; Application RW data (.data) RW_IRAM1 +0 ALIGN 0x10 diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_GCC_ARM/RZA1H.ld b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_GCC_ARM/RZA1H.ld index 2b10e18b0a4..6f57f3067d7 100644 --- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_GCC_ARM/RZA1H.ld +++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_GCC_ARM/RZA1H.ld @@ -117,7 +117,7 @@ SECTIONS .copy.table : { - . = ALIGN(4); + . = ALIGN(8); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) @@ -133,7 +133,7 @@ SECTIONS .zero.table : { - . = ALIGN(4); + . = ALIGN(8); __zero_table_start__ = .; LONG (__bss_start__) LONG (__bss_end__ - __bss_start__) @@ -142,7 +142,7 @@ SECTIONS __zero_table_end__ = .; } > SFLASH - .ram_code : ALIGN( 0x4 ) { + .ram_code : ALIGN( 0x8 ) { __ram_code_load = .; __ram_code_start = LOADADDR(.ram_code) + ( __ram_code_load - ADDR(.ram_code) ); @@ -150,7 +150,7 @@ SECTIONS *(RAM_CONST) - . = ALIGN( 0x4 ); + . = ALIGN( 0x8 ); __ram_code_end = LOADADDR(.ram_code) + ( . - ADDR(.ram_code) ); } > RAM AT > SFLASH @@ -175,13 +175,13 @@ SECTIONS *(.data*) Image$$RW_DATA$$Limit = .; - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -189,14 +189,14 @@ SECTIONS PROVIDE (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -245,7 +245,7 @@ SECTIONS __nc_data_start = .; *(NC_DATA) - . = ALIGN(4); + . = ALIGN(8); __nc_data_end = .; Image$$RW_DATA_NC$$Limit = .; } > RAM_NC @@ -256,7 +256,7 @@ SECTIONS __nc_bss_start = .; *(NC_BSS) - . = ALIGN(4); + . = ALIGN(8); __nc_bss_end = .; Image$$ZI_DATA_NC$$Limit = .; } > RAM_NC diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/device/TOOLCHAIN_GCC_ARM/VKRZA1H.ld b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/device/TOOLCHAIN_GCC_ARM/VKRZA1H.ld index b2a7fa5caa5..e24116c99a7 100644 --- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/device/TOOLCHAIN_GCC_ARM/VKRZA1H.ld +++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/device/TOOLCHAIN_GCC_ARM/VKRZA1H.ld @@ -114,7 +114,7 @@ SECTIONS .copy.table : { - . = ALIGN(4); + . = ALIGN(8); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) @@ -127,7 +127,7 @@ SECTIONS .zero.table : { - . = ALIGN(4); + . = ALIGN(8); __zero_table_start__ = .; LONG (__bss_start__) LONG (__bss_end__ - __bss_start__) @@ -153,13 +153,13 @@ SECTIONS *(.data*) Image$$RW_DATA$$Limit = .; - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -167,14 +167,14 @@ SECTIONS PROVIDE (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -223,7 +223,7 @@ SECTIONS __nc_data_start = .; *(NC_DATA) - . = ALIGN(4); + . = ALIGN(8); __nc_data_end = .; Image$$RW_DATA_NC$$Limit = .; } > RAM_NC @@ -234,7 +234,7 @@ SECTIONS __nc_bss_start = .; *(NC_BSS) - . = ALIGN(4); + . = ALIGN(8); __nc_bss_end = .; Image$$ZI_DATA_NC$$Limit = .; } > RAM_NC From 26dc7bd562b7a51acd0e3efb0390e02df6b2bf6b Mon Sep 17 00:00:00 2001 From: Deepika Date: Wed, 19 Sep 2018 10:13:32 -0500 Subject: [PATCH 08/13] Analog Devices: Fix alignment of execute region to 8-byte boundary --legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to remove deprecated flags all linker files (GCC and IAR as well to have uniformity) should strictly align to 8-byte boundary --- .../TOOLCHAIN_GCC_ARM/ADuCM3029.ld | 20 +++++++++---------- .../TOOLCHAIN_GCC_ARM/ADuCM4050.ld | 12 +++++------ 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_GCC_ARM/ADuCM3029.ld b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_GCC_ARM/ADuCM3029.ld index c645aa5891c..b78bfa9bc9d 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_GCC_ARM/ADuCM3029.ld +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_GCC_ARM/ADuCM3029.ld @@ -128,7 +128,7 @@ SECTIONS /* .copy.table : { - . = ALIGN(4); + . = ALIGN(8); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) @@ -146,7 +146,7 @@ SECTIONS .zero.table : { - . = ALIGN(4); + . = ALIGN(8); __zero_table_start__ = .; LONG (__bss_start__) LONG (__bss_end__ - __bss_start__) @@ -164,13 +164,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -178,7 +178,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -186,7 +186,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -194,7 +194,7 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; KEEP(*(.bss.gChannelControlDataArray)) KEEP(*(.bss.thread_stack_main)) @@ -202,16 +202,16 @@ SECTIONS KEEP(*(.bss.os_thread_def_stack_event_loop_thread)) *(COMMON) *(.bss) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > DSRAM_C .bss2 : { - . = ALIGN(4); + . = ALIGN(8); __bss2_start__ = .; *(.bss*) - . = ALIGN(4); + . = ALIGN(8); __bss2_end__ = .; } > DSRAM_B diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld index b5fbca4cb97..d025aae5c8e 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld @@ -130,7 +130,7 @@ SECTIONS /* .copy.table : { - . = ALIGN(4); + . = ALIGN(8); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) @@ -148,7 +148,7 @@ SECTIONS .zero.table : { - . = ALIGN(4); + . = ALIGN(8); __zero_table_start__ = .; LONG (__bss_start__) LONG (__bss_end__ - __bss_start__) @@ -166,13 +166,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -180,7 +180,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -188,7 +188,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; From 2d95fcb9cf3329ca6b62a22da1468d385cc54547 Mon Sep 17 00:00:00 2001 From: Deepika Date: Wed, 19 Sep 2018 10:13:49 -0500 Subject: [PATCH 09/13] Onsemi: Fix alignment of execute region to 8-byte boundary --legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to remove deprecated flags all linker files (GCC and IAR as well to have uniformity) should strictly align to 8-byte boundary --- .../TARGET_NCS36510/device/TOOLCHAIN_GCC_ARM/NCS36510.ld | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_GCC_ARM/NCS36510.ld b/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_GCC_ARM/NCS36510.ld index 5848e5490bc..7f3deede0fc 100644 --- a/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_GCC_ARM/NCS36510.ld +++ b/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_GCC_ARM/NCS36510.ld @@ -53,7 +53,7 @@ MEMORY { { __vector_table = .; KEEP(*(.vector_table)) - . = ALIGN(4); + . = ALIGN(8); } > VECTORS @@ -104,20 +104,20 @@ MEMORY { *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) From 05fe53a2c5fc4a917e3f01818711fc4f402b3c4b Mon Sep 17 00:00:00 2001 From: Deepika Date: Wed, 19 Sep 2018 10:14:05 -0500 Subject: [PATCH 10/13] Wiznet: Fix alignment of execute region to 8-byte boundary --legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to remove deprecated flags all linker files (GCC and IAR as well to have uniformity) should strictly align to 8-byte boundary --- .../device/TOOLCHAIN_GCC_ARM/W7500.ld | 12 ++++++------ .../device/TOOLCHAIN_GCC_ARM/W7500.ld | 12 ++++++------ .../device/TOOLCHAIN_GCC_ARM/W7500.ld | 12 ++++++------ 3 files changed, 18 insertions(+), 18 deletions(-) diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_GCC_ARM/W7500.ld b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_GCC_ARM/W7500.ld index 0d53146fc56..29f5e3f80ad 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_GCC_ARM/W7500.ld +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_GCC_ARM/W7500.ld @@ -85,13 +85,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -99,7 +99,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -107,7 +107,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -115,11 +115,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_GCC_ARM/W7500.ld b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_GCC_ARM/W7500.ld index 0d53146fc56..29f5e3f80ad 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_GCC_ARM/W7500.ld +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_GCC_ARM/W7500.ld @@ -85,13 +85,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -99,7 +99,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -107,7 +107,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -115,11 +115,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_GCC_ARM/W7500.ld b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_GCC_ARM/W7500.ld index 0d53146fc56..29f5e3f80ad 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_GCC_ARM/W7500.ld +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_GCC_ARM/W7500.ld @@ -85,13 +85,13 @@ SECTIONS *(vtable) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) @@ -99,7 +99,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -107,7 +107,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -115,11 +115,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM From 1a6048f9c6245cc523d7639f60d535249e21560d Mon Sep 17 00:00:00 2001 From: Deepika Date: Wed, 19 Sep 2018 10:17:27 -0500 Subject: [PATCH 11/13] Realtek: Fix alignment of execute region to 8-byte boundary --legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to remove deprecated flags all linker files (GCC and IAR as well to have uniformity) should strictly align to 8-byte boundary --- .../device/TOOLCHAIN_GCC_ARM/rtl8195a.ld | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld index a82398e3803..7756a3b7c3e 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld @@ -66,7 +66,7 @@ SECTIONS .text.sram1 : { - . = ALIGN(4); + . = ALIGN(8); *rtl8195a_crypto*.o (.text* .rodata*) *mbedtls*.o (.text* .rodata*) *libc.a: (.text* .rodata*) @@ -77,7 +77,7 @@ SECTIONS .text.sram2 : { - . = ALIGN(4); + . = ALIGN(8); *(.text*) KEEP(*(.init)) @@ -107,7 +107,7 @@ SECTIONS .data.sram1 : { - . = ALIGN(4); + . = ALIGN(8); __sram_data_start__ = .; *rtl8195a_crypto*.o (.data*) *mbedtls*.o (.data*) @@ -121,27 +121,27 @@ SECTIONS *(.data*) *(.sdram.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE (__fini_array_end = .); - . = ALIGN(4); + . = ALIGN(8); __sdram_data_end__ = .; /* All data end */ From 4566241849255ee5fae0a2467ff374a3d3d40ce0 Mon Sep 17 00:00:00 2001 From: Deepika Date: Wed, 19 Sep 2018 10:17:44 -0500 Subject: [PATCH 12/13] Ublox: Fix alignment of execute region to 8-byte boundary --legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to remove deprecated flags all linker files (GCC and IAR as well to have uniformity) should strictly align to 8-byte boundary --- .../device/TOOLCHAIN_GCC_ARM/hi2110.ld | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_GCC_ARM/hi2110.ld b/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_GCC_ARM/hi2110.ld index c39ec675a35..d124a964419 100644 --- a/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_GCC_ARM/hi2110.ld +++ b/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_GCC_ARM/hi2110.ld @@ -24,7 +24,7 @@ SECTIONS /* Code and const data */ .text : { - . = ALIGN(4); + . = ALIGN(8); *(.text) *(.text*) @@ -77,20 +77,20 @@ SECTIONS *(.data) *(.data*) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -105,12 +105,12 @@ SECTIONS /* Uninitialised data */ .bss (NOLOAD): { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss) *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM @@ -118,7 +118,7 @@ SECTIONS .resume (NOLOAD): { - . = ALIGN(4); + . = ALIGN(8); *(preserve) } > RAM @@ -161,7 +161,7 @@ SECTIONS /* The size of this section (256 bytes) is already taken off the size of RAM so there is no danger of the heap overflowing into it */ .ipc_mailbox (NOLOAD): { - . = ALIGN(4); + . = ALIGN(8); __ipc_mailbox_start__ = .; *(.ipc_mailbox) *(.ipc_mailbox*) From 08051f5c23e7ced06a515754e385ca29e75d2841 Mon Sep 17 00:00:00 2001 From: Deepika Date: Wed, 19 Sep 2018 10:06:15 -0500 Subject: [PATCH 13/13] SiLabs: Fix alignment of execute region to 8-byte boundary --legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to remove deprecated flags all linker files (GCC and IAR as well to have uniformity) should strictly align to 8-byte boundary --- .../TOOLCHAIN_ARM_MICRO/efm32gg.sct | 2 +- .../TOOLCHAIN_ARM_STD/efm32gg.sct | 2 +- .../TARGET_1024K/TOOLCHAIN_GCC_ARM/efm32gg.ld | 22 +++++++++---------- .../TOOLCHAIN_IAR/efm32gg990f1024.icf | 4 ++-- .../device/TOOLCHAIN_GCC_ARM/efm32gg11.ld | 18 +++++++-------- .../TOOLCHAIN_ARM_MICRO/efm32hg.sct | 2 +- .../TARGET_64K/TOOLCHAIN_GCC_ARM/efm32hg.ld | 22 +++++++++---------- .../TOOLCHAIN_IAR/efm32hg322f64.icf | 4 ++-- .../TARGET_256K/TOOLCHAIN_GCC_ARM/efm32lg.ld | 18 +++++++-------- .../TOOLCHAIN_GCC_ARM/efm32pg1b.ld | 18 +++++++-------- .../device/TOOLCHAIN_ARM_STD/efr32pg12b.sct | 2 +- .../device/TOOLCHAIN_GCC_ARM/efm32pg12b.ld | 20 ++++++++--------- .../TOOLCHAIN_IAR/EFM32PG12B500F1024GL125.icf | 4 ++-- .../TARGET_256K/TOOLCHAIN_GCC_ARM/efm32wg.ld | 18 +++++++-------- .../TOOLCHAIN_ARM_MICRO/efm32zg.sct | 2 +- .../TARGET_32K/TOOLCHAIN_GCC_ARM/efm32zg.ld | 22 +++++++++---------- .../TOOLCHAIN_IAR/efm32zg222f32.icf | 4 ++-- .../device/TOOLCHAIN_GCC_ARM/efr32mg1p.ld | 18 +++++++-------- .../device/TOOLCHAIN_ARM_STD/efr32mg12p.sct | 2 +- .../device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld | 22 +++++++++---------- .../TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf | 4 ++-- 21 files changed, 115 insertions(+), 115 deletions(-) diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct index b3c7d855dba..ce41a9ad0e5 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct @@ -17,7 +17,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x200000DC 0x0001FF24 { ; RW data + RW_IRAM1 0x200000E0 0x0001FF20 { ; RW data .ANY (+RW +ZI) } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct index b3c7d855dba..ce41a9ad0e5 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct @@ -17,7 +17,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x200000DC 0x0001FF24 { ; RW data + RW_IRAM1 0x200000E0 0x0001FF20 { ; RW data .ANY (+RW +ZI) } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_GCC_ARM/efm32gg.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_GCC_ARM/efm32gg.ld index a354adedeab..e1c8092a463 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_GCC_ARM/efm32gg.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_GCC_ARM/efm32gg.ld @@ -30,8 +30,8 @@ MEMORY } /* MBED: mbed needs to be able to dynamically set the interrupt vector table. * We make room for the table at the very beginning of RAM, i.e. at - * 0x20000000. We need (16+39) * sizeof(uint32_t) = 220 bytes for EFM32GG */ -__vector_size = 0xDC; + * 0x20000000. We need (16+39) * sizeof(uint32_t) = 220 4(8-byte aligned) bytes for EFM32GG */ +__vector_size = 0xE0; /* Linker script to place sections and symbol values. Should be used together * with other linker script that defines memory regions FLASH and RAM. @@ -119,7 +119,7 @@ SECTIONS /* .copy.table : { - . = ALIGN(4); + . = ALIGN(8); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) @@ -137,7 +137,7 @@ SECTIONS /* .zero.table : { - . = ALIGN(4); + . = ALIGN(8); __zero_table_start__ = .; LONG (__bss_start__) LONG (__bss_end__ - __bss_start__) @@ -160,23 +160,23 @@ SECTIONS PROVIDE( __end_vector_table__ = .); *(vtable) *(.data*) - . = ALIGN (4); + . = ALIGN (8); *(.ram) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -184,7 +184,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -206,11 +206,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf index f60b984a8cd..e57dada035e 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf @@ -11,8 +11,8 @@ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START; define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; define symbol __NVIC_start__ = 0x20000000; -define symbol __NVIC_end__ = 0x200000DB; -define symbol __ICFEDIT_region_RAM_start__ = 0x200000DC; +define symbol __NVIC_end__ = 0x200000DF; +define symbol __ICFEDIT_region_RAM_start__ = 0x200000E0; define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; /*-Sizes-*/ /*Heap 1/4 of ram and stack 1/8*/ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld index 86bfde48510..699f40b12ac 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld @@ -113,7 +113,7 @@ SECTIONS /* .copy.table : { - . = ALIGN(4); + . = ALIGN(8); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) @@ -131,7 +131,7 @@ SECTIONS /* .zero.table : { - . = ALIGN(4); + . = ALIGN(8); __zero_table_start__ = .; LONG (__bss_start__) LONG (__bss_end__ - __bss_start__) @@ -151,23 +151,23 @@ SECTIONS PROVIDE( __end_vector_table__ = .); *(vtable) *(.data*) - . = ALIGN (4); + . = ALIGN (8); *(.ram) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -175,7 +175,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -183,11 +183,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_ARM_MICRO/efm32hg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_ARM_MICRO/efm32hg.sct index 8eed05311d9..b31dbbe37ff 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_ARM_MICRO/efm32hg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_ARM_MICRO/efm32hg.sct @@ -17,7 +17,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000094 0x00001F6C { ; RW data + RW_IRAM1 0x20000098 0x00001F68 { ; RW data .ANY (+RW +ZI) } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_GCC_ARM/efm32hg.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_GCC_ARM/efm32hg.ld index e11addfa541..ffca89e3694 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_GCC_ARM/efm32hg.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_GCC_ARM/efm32hg.ld @@ -25,8 +25,8 @@ MEMORY /* MBED: mbed needs to be able to dynamically set the interrupt vector table. * We make room for the table at the very beginning of RAM, i.e. at - * 0x20000000. We need (16+21) * sizeof(uint32_t) = 148 bytes for EFM32HG */ -__vector_size = 0x94; + * 0x20000000. We need (16+21) * sizeof(uint32_t) = 148+4(8-byte aligned) bytes for EFM32HG */ +__vector_size = 0x98; /* Linker script to place sections and symbol values. Should be used together * with other linker script that defines memory regions FLASH and RAM. @@ -113,7 +113,7 @@ SECTIONS /* .copy.table : { - . = ALIGN(4); + . = ALIGN(8); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) @@ -131,7 +131,7 @@ SECTIONS /* .zero.table : { - . = ALIGN(4); + . = ALIGN(8); __zero_table_start__ = .; LONG (__bss_start__) LONG (__bss_end__ - __bss_start__) @@ -152,23 +152,23 @@ SECTIONS PROVIDE( __end_vector_table__ = .); *(vtable) *(.data*) - . = ALIGN (4); + . = ALIGN (8); *(.ram) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -176,7 +176,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -184,11 +184,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_IAR/efm32hg322f64.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_IAR/efm32hg322f64.icf index 18add8aec9d..22c8439dfe4 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_IAR/efm32hg322f64.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_IAR/efm32hg322f64.icf @@ -11,8 +11,8 @@ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START; define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; define symbol __NVIC_start__ = 0x20000000; -define symbol __NVIC_end__ = 0x20000093; -define symbol __ICFEDIT_region_RAM_start__ = 0x20000094; +define symbol __NVIC_end__ = 0x20000097; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000098; define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF; /*-Sizes-*/ /*Heap 1/4 of ram and stack 1/8*/ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32lg.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32lg.ld index 910d54a82a1..3ccec3d81f3 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32lg.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32lg.ld @@ -112,7 +112,7 @@ SECTIONS /* .copy.table : { - . = ALIGN(4); + . = ALIGN(8); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) @@ -130,7 +130,7 @@ SECTIONS /* .zero.table : { - . = ALIGN(4); + . = ALIGN(8); __zero_table_start__ = .; LONG (__bss_start__) LONG (__bss_end__ - __bss_start__) @@ -151,23 +151,23 @@ SECTIONS PROVIDE( __end_vector_table__ = .); *(vtable) *(.data*) - . = ALIGN (4); + . = ALIGN (8); *(.ram) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -175,7 +175,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -183,11 +183,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32pg1b.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32pg1b.ld index c8b31ea93b0..cc78895a91d 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32pg1b.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32pg1b.ld @@ -113,7 +113,7 @@ SECTIONS /* .copy.table : { - . = ALIGN(4); + . = ALIGN(8); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) @@ -131,7 +131,7 @@ SECTIONS /* .zero.table : { - . = ALIGN(4); + . = ALIGN(8); __zero_table_start__ = .; LONG (__bss_start__) LONG (__bss_end__ - __bss_start__) @@ -151,23 +151,23 @@ SECTIONS PROVIDE( __end_vector_table__ = .); *(vtable) *(.data*) - . = ALIGN (4); + . = ALIGN (8); *(.ram) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -175,7 +175,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -183,11 +183,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_ARM_STD/efr32pg12b.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_ARM_STD/efr32pg12b.sct index aa5994119b9..b06400e44d3 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_ARM_STD/efr32pg12b.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_ARM_STD/efr32pg12b.sct @@ -17,7 +17,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x2000010C 0x0003FEF4 { ; RW data + RW_IRAM1 0x20000110 0x0003FEF0 { ; RW data .ANY (+RW +ZI) } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_GCC_ARM/efm32pg12b.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_GCC_ARM/efm32pg12b.ld index 5cf15baf950..6ddce742880 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_GCC_ARM/efm32pg12b.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_GCC_ARM/efm32pg12b.ld @@ -25,8 +25,8 @@ MEMORY /* MBED: mbed needs to be able to dynamically set the interrupt vector table. * We make room for the table at the very beginning of RAM, i.e. at - * 0x20000000. We need (16+51 * sizeof(uint32_t) = 268 bytes for EFM32PG */ -__vector_size = 0x10C; + * 0x20000000. We need (16+51 * sizeof(uint32_t) = 268 + 4 (8-byte aligned) bytes for EFM32PG */ +__vector_size = 0x110; /* Linker script to place sections and symbol values. Should be used together * with other linker script that defines memory regions FLASH and RAM. @@ -113,7 +113,7 @@ SECTIONS /* .copy.table : { - . = ALIGN(4); + . = ALIGN(8); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) @@ -131,7 +131,7 @@ SECTIONS /* .zero.table : { - . = ALIGN(4); + . = ALIGN(8); __zero_table_start__ = .; LONG (__bss_start__) LONG (__bss_end__ - __bss_start__) @@ -154,20 +154,20 @@ SECTIONS . = ALIGN (4); *(.ram) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -175,7 +175,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -183,11 +183,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_IAR/EFM32PG12B500F1024GL125.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_IAR/EFM32PG12B500F1024GL125.icf index 77502fddeba..2a914564f2b 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_IAR/EFM32PG12B500F1024GL125.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_IAR/EFM32PG12B500F1024GL125.icf @@ -12,8 +12,8 @@ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START; define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; define symbol __NVIC_start__ = 0x20000000; -define symbol __NVIC_end__ = 0x2000010B; -define symbol __ICFEDIT_region_RAM_start__ = 0x2000010C; +define symbol __NVIC_end__ = 0x2000010F; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000110; define symbol __ICFEDIT_region_RAM_end__ = (0x20000000+0x00040000-1); /*-Sizes-*/ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32wg.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32wg.ld index e3467258ac7..61dd3871f32 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32wg.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32wg.ld @@ -113,7 +113,7 @@ SECTIONS /* .copy.table : { - . = ALIGN(4); + . = ALIGN(8); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) @@ -131,7 +131,7 @@ SECTIONS /* .zero.table : { - . = ALIGN(4); + . = ALIGN(8); __zero_table_start__ = .; LONG (__bss_start__) LONG (__bss_end__ - __bss_start__) @@ -152,23 +152,23 @@ SECTIONS PROVIDE( __end_vector_table__ = .); *(vtable) *(.data*) - . = ALIGN (4); + . = ALIGN (8); *(.ram) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -176,7 +176,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -184,11 +184,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_ARM_MICRO/efm32zg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_ARM_MICRO/efm32zg.sct index 01787114365..e3d88fc389a 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_ARM_MICRO/efm32zg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_ARM_MICRO/efm32zg.sct @@ -17,7 +17,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x2000008C 0x00000F74 { ; RW data + RW_IRAM1 0x20000090 0x00000F70 { ; RW data .ANY (+RW +ZI) } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_GCC_ARM/efm32zg.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_GCC_ARM/efm32zg.ld index 1d10c10fd42..22568ec19d9 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_GCC_ARM/efm32zg.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_GCC_ARM/efm32zg.ld @@ -25,8 +25,8 @@ MEMORY /* MBED: mbed needs to be able to dynamically set the interrupt vector table. * We make room for the table at the very beginning of RAM, i.e. at - * 0x20000000. We need (16+19) * sizeof(uint32_t) = 140 bytes for EFM32ZG */ -__vector_size = 0x8C; + * 0x20000000. We need (16+19) * sizeof(uint32_t) = 140 + 4(8-byte aligned) bytes for EFM32ZG */ +__vector_size = 0x90; /* Linker script to place sections and symbol values. Should be used together * with other linker script that defines memory regions FLASH and RAM. @@ -113,7 +113,7 @@ SECTIONS /* .copy.table : { - . = ALIGN(4); + . = ALIGN(8); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) @@ -131,7 +131,7 @@ SECTIONS /* .zero.table : { - . = ALIGN(4); + . = ALIGN(8); __zero_table_start__ = .; LONG (__bss_start__) LONG (__bss_end__ - __bss_start__) @@ -152,23 +152,23 @@ SECTIONS PROVIDE( __end_vector_table__ = .); *(vtable) *(.data*) - . = ALIGN (4); + . = ALIGN (8); *(.ram) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -176,7 +176,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -184,11 +184,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_IAR/efm32zg222f32.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_IAR/efm32zg222f32.icf index 5cabed38b6d..2ece65a90e8 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_IAR/efm32zg222f32.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_IAR/efm32zg222f32.icf @@ -11,8 +11,8 @@ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START; define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; define symbol __NVIC_start__ = 0x20000000; -define symbol __NVIC_end__ = 0x2000008B; -define symbol __ICFEDIT_region_RAM_start__ = 0x2000008C; +define symbol __NVIC_end__ = 0x2000008F; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000090; define symbol __ICFEDIT_region_RAM_end__ = 0x20000FFF; /*-Sizes-*/ /*Heap 1/4 of ram and stack 1/8*/ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_GCC_ARM/efr32mg1p.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_GCC_ARM/efr32mg1p.ld index 3532c446460..ad8928f16da 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_GCC_ARM/efr32mg1p.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_GCC_ARM/efr32mg1p.ld @@ -113,7 +113,7 @@ SECTIONS /* .copy.table : { - . = ALIGN(4); + . = ALIGN(8); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) @@ -131,7 +131,7 @@ SECTIONS /* .zero.table : { - . = ALIGN(4); + . = ALIGN(8); __zero_table_start__ = .; LONG (__bss_start__) LONG (__bss_end__ - __bss_start__) @@ -151,23 +151,23 @@ SECTIONS PROVIDE( __end_vector_table__ = .); *(vtable) *(.data*) - . = ALIGN (4); + . = ALIGN (8); *(.ram) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -175,7 +175,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -183,11 +183,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct index aa5994119b9..b06400e44d3 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct @@ -17,7 +17,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x2000010C 0x0003FEF4 { ; RW data + RW_IRAM1 0x20000110 0x0003FEF0 { ; RW data .ANY (+RW +ZI) } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld index 4444a7ea101..8ab03636c68 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld @@ -25,8 +25,8 @@ MEMORY /* MBED: mbed needs to be able to dynamically set the interrupt vector table. * We make room for the table at the very beginning of RAM, i.e. at - * 0x20000000. We need (16+51 * sizeof(uint32_t) = 268 bytes for EFM32PG */ -__vector_size = 0x10C; + * 0x20000000. We need (16+51 * sizeof(uint32_t) = 268 + 4(8-byte aligned) bytes for EFM32PG */ +__vector_size = 0x110; /* Linker script to place sections and symbol values. Should be used together * with other linker script that defines memory regions FLASH and RAM. @@ -113,7 +113,7 @@ SECTIONS /* .copy.table : { - . = ALIGN(4); + . = ALIGN(8); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) @@ -131,7 +131,7 @@ SECTIONS /* .zero.table : { - . = ALIGN(4); + . = ALIGN(8); __zero_table_start__ = .; LONG (__bss_start__) LONG (__bss_end__ - __bss_start__) @@ -151,23 +151,23 @@ SECTIONS PROVIDE( __end_vector_table__ = .); *(vtable) *(.data*) - . = ALIGN (4); + . = ALIGN (8); *(.ram) - . = ALIGN(4); + . = ALIGN(8); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); + . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) @@ -175,7 +175,7 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) - . = ALIGN(4); + . = ALIGN(8); /* All data end */ __data_end__ = .; @@ -183,11 +183,11 @@ SECTIONS .bss : { - . = ALIGN(4); + . = ALIGN(8); __bss_start__ = .; *(.bss*) *(COMMON) - . = ALIGN(4); + . = ALIGN(8); __bss_end__ = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf index b13edd25a8b..fd26aeb5729 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf @@ -11,8 +11,8 @@ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START; define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; define symbol __NVIC_start__ = 0x20000000; -define symbol __NVIC_end__ = 0x2000010B; -define symbol __ICFEDIT_region_RAM_start__ = 0x2000010C; +define symbol __NVIC_end__ = 0x2000010F; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000110; define symbol __ICFEDIT_region_RAM_end__ = 0x2003FFFF; /*-Sizes-*/ /*Heap 1/4 of ram and stack 1/8*/