From ad668a74dd194da8bc48468f2c914e067fed7f8a Mon Sep 17 00:00:00 2001 From: Qinghao Shi Date: Fri, 8 Jun 2018 11:20:42 +0100 Subject: [PATCH 1/5] Enable new HAL us_ticker API on fast model MPS2 platform --- .../TARGET_FVP_MPS2_M0/device/CMSDK_CM0.h | 16 ++-- .../device/CMSDK_CM0plus.h | 16 ++-- .../TARGET_FVP_MPS2_M3/device/CMSDK_CM3.h | 16 ++-- .../TARGET_FVP_MPS2_M4/device/CMSDK_CM4.h | 16 ++-- .../TARGET_FVP_MPS2_M7/device/CMSDK_CM7.h | 16 ++-- .../TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c | 79 +++++++++++++------ targets/targets.json | 2 +- 7 files changed, 94 insertions(+), 67 deletions(-) diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/CMSDK_CM0.h b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/CMSDK_CM0.h index 1daab820b30..fb67de22e6e 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/CMSDK_CM0.h +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/CMSDK_CM0.h @@ -270,7 +270,7 @@ typedef struct { #define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */ @@ -306,7 +306,7 @@ typedef struct { #define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */ @@ -329,12 +329,12 @@ typedef struct { typedef struct { __IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */ - __I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */ - __IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */ - __O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */ - __I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */ - __I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */ - __IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */ + __I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */ + __IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */ + __O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */ + __I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */ + __I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */ + __IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */ } CMSDK_DUALTIMER_SINGLE_TypeDef; #define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */ diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/CMSDK_CM0plus.h b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/CMSDK_CM0plus.h index a63b6c14487..79dc9191125 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/CMSDK_CM0plus.h +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/CMSDK_CM0plus.h @@ -271,7 +271,7 @@ typedef struct { #define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */ @@ -307,7 +307,7 @@ typedef struct { #define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */ @@ -330,12 +330,12 @@ typedef struct { typedef struct { __IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */ - __I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */ - __IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */ - __O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */ - __I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */ - __I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */ - __IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */ + __I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */ + __IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */ + __O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */ + __I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */ + __I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */ + __IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */ } CMSDK_DUALTIMER_SINGLE_TypeDef; #define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */ diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/CMSDK_CM3.h b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/CMSDK_CM3.h index 0b4746d1a73..1b8c9f165bd 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/CMSDK_CM3.h +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/CMSDK_CM3.h @@ -272,7 +272,7 @@ typedef struct { #define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */ @@ -308,7 +308,7 @@ typedef struct { #define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */ @@ -331,12 +331,12 @@ typedef struct { typedef struct { __IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */ - __I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */ - __IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */ - __O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */ - __I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */ - __I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */ - __IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */ + __I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */ + __IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */ + __O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */ + __I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */ + __I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */ + __IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */ } CMSDK_DUALTIMER_SINGLE_TypeDef; #define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */ diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/CMSDK_CM4.h b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/CMSDK_CM4.h index a7bb39bfe94..d51b4e3c282 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/CMSDK_CM4.h +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/CMSDK_CM4.h @@ -321,7 +321,7 @@ typedef struct { #define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /*!< CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /*!< CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /*!< CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /*!< CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /*!< CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /*!< CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */ @@ -357,7 +357,7 @@ typedef struct { #define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /*!< CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /*!< CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /*!< CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /*!< CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /*!< CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /*!< CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */ @@ -379,8 +379,8 @@ typedef struct { typedef struct { __IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */ - __I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */ - __IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */ + __I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */ + __IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */ /* TimerEn: Timer Enable */ /* TimerMode: Timer Mode */ /* <0=> Freerunning-mode */ @@ -398,10 +398,10 @@ typedef struct { /* <0=> Wrapping mode */ /* <1=> One-shot mode */ /* */ - __O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */ - __I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */ - __I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */ - __IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */ + __O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */ + __I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */ + __I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */ + __IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */ } CMSDK_DUALTIMER_SINGLE_TypeDef; #define CMSDK_DUALTIMER_LOAD_Pos 0 /*!< CMSDK_DUALTIMER LOAD: LOAD Position */ diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/CMSDK_CM7.h b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/CMSDK_CM7.h index 2b82b87ef4d..d26198a2e93 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/CMSDK_CM7.h +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/CMSDK_CM7.h @@ -278,7 +278,7 @@ typedef struct { #define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */ @@ -314,7 +314,7 @@ typedef struct { #define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */ @@ -337,12 +337,12 @@ typedef struct { typedef struct { __IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */ - __I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */ - __IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */ - __O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */ - __I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */ - __I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */ - __IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */ + __I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */ + __IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */ + __O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */ + __I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */ + __I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */ + __IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */ } CMSDK_DUALTIMER_SINGLE_TypeDef; #define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */ diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c index 04fc483601d..74d7597a430 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c @@ -16,43 +16,69 @@ #include #include "us_ticker_api.h" #include "PeripheralNames.h" - #define US_TICKER_TIMER1 CMSDK_DUALTIMER1 #define US_TICKER_TIMER2 CMSDK_DUALTIMER2 #define US_TICKER_TIMER_IRQn DUALTIMER_IRQn +/** mbed OS HAL API defined us_ticker as an increment ticker + * MPS2 platform provided in SSE-200 are decrement tickers + * with interrupt fired counter reaches 0. + * + * So 2 Timers are used to construct mbed OS HAL ticker. + * TIMER1 is for counting, and returns inverted binary when read from it + * TIMER2 is for generate interrupts + */ int us_ticker_inited = 0; void us_ticker_init(void) { if (us_ticker_inited) { + us_ticker_disable_interrupt(); return; } - us_ticker_inited = 1; - US_TICKER_TIMER1->TimerControl = 0x0; // disable timer - US_TICKER_TIMER2->TimerControl = 0x00; // disable timer - US_TICKER_TIMER1->TimerLoad = 0xFFFFFFFF; - US_TICKER_TIMER2->TimerLoad = 0xFFFFFFFF; + US_TICKER_TIMER1->TimerControl = 0x0ul; // disable TIMER1 and reset all control + US_TICKER_TIMER2->TimerControl = 0x0ul; // disable TIMER2 and reset all control + + US_TICKER_TIMER1->TimerLoad = 0xFFFFFFFFul; + US_TICKER_TIMER2->TimerLoad = 0xFFFFFFFFul; + + US_TICKER_TIMER1->TimerControl |= CMSDK_DUALTIMER1_CTRL_SIZE_Msk; // set TIMER1 to 32 bit counter + US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_SIZE_Msk; // set TIMER2 to 32 bit counter - US_TICKER_TIMER1->TimerControl = 0x62; // enable interrupt and set to 32 bit counter and set to periodic mode - US_TICKER_TIMER2->TimerControl = 0x42; // enable interrupt and set to 32 bit counter + US_TICKER_TIMER1->TimerControl |= CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk; // set TIMER1 with 4 stages prescale + US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk; // set TIMER2 with 4 stages prescale - US_TICKER_TIMER1->TimerControl |= 0x80; // enable counter - US_TICKER_TIMER2->TimerControl |= 0x80; // enable counter + US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_MODE_Msk; // set TIMER2 periodic mode + + US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_ONESHOOT_Msk; // set TIMER2 one-shot mode + + US_TICKER_TIMER1->TimerControl |= CMSDK_DUALTIMER1_CTRL_EN_Msk; // enable TIMER1 counter + US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_EN_Msk; // enable TIMER2 counter NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler); NVIC_EnableIRQ(US_TICKER_TIMER_IRQn); + us_ticker_inited = 1; +} + +void us_ticker_free(void) +{ + if (!us_ticker_inited) { + return; + } + + US_TICKER_TIMER1->TimerControl &= ~CMSDK_DUALTIMER1_CTRL_EN_Msk; // disable TIMER1 + US_TICKER_TIMER2->TimerControl &= ~CMSDK_DUALTIMER2_CTRL_EN_Msk; // disable TIMER2 + us_ticker_inited = 0; } uint32_t us_ticker_read() { - uint32_t return_value = 0; if (!us_ticker_inited) { us_ticker_init(); } - return_value = ((~US_TICKER_TIMER2->TimerValue) / 25); - return return_value; + + return ~US_TICKER_TIMER1->TimerValue; } void us_ticker_set_interrupt(timestamp_t timestamp) @@ -61,12 +87,10 @@ void us_ticker_set_interrupt(timestamp_t timestamp) us_ticker_init(); } - uint32_t delta = timestamp - us_ticker_read(); - // enable interrupt - US_TICKER_TIMER1->TimerControl = 0x0; // disable timer - US_TICKER_TIMER1->TimerControl = 0x62; // enable interrupt and set to 32 bit counter and set to periodic mode - US_TICKER_TIMER1->TimerLoad = (delta) * 25; //initialise the timer value - US_TICKER_TIMER1->TimerControl |= 0x80; //enable timer + uint32_t delta = timestamp - us_ticker_read(); + US_TICKER_TIMER2->TimerLoad = delta; // Set TIMER2 load value + US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_INTEN_Msk; // enable TIMER2 interrupt + } void us_ticker_fire_interrupt(void) @@ -77,16 +101,19 @@ void us_ticker_fire_interrupt(void) void us_ticker_disable_interrupt(void) { - - US_TICKER_TIMER1->TimerControl &= 0xDF; - US_TICKER_TIMER2->TimerControl &= 0xDF; - + US_TICKER_TIMER2->TimerControl &= ~CMSDK_DUALTIMER2_CTRL_INTEN_Msk; } void us_ticker_clear_interrupt(void) { + US_TICKER_TIMER2->TimerIntClr = CMSDK_DUALTIMER2_INTCLR_Msk; +} - US_TICKER_TIMER1->TimerIntClr = 0x1; - US_TICKER_TIMER2->TimerIntClr = 0x1; - +const ticker_info_t *us_ticker_get_info(void) +{ + static const ticker_info_t info = { + 1562500, // 4 stages prescale from 25MHz (dived by 16) + 32 // 32 bit counter + }; + return &info; } diff --git a/targets/targets.json b/targets/targets.json index 0025d90d9cd..66195ca7ea1 100755 --- a/targets/targets.json +++ b/targets/targets.json @@ -4128,7 +4128,7 @@ "public": false, "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], "OUTPUT_EXT": "elf", - "device_has": ["AACI", "ANALOGIN", "CLCD", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"], + "device_has": ["AACI", "ANALOGIN", "CLCD", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC", "USTICKER"], "release_versions": ["5"] }, "FVP_MPS2_M0": { From 810d534c0732e0d90cc55ef29fb275f6d72f2d38 Mon Sep 17 00:00:00 2001 From: Qinghao Shi Date: Mon, 11 Jun 2018 11:49:02 +0100 Subject: [PATCH 2/5] update us_ticker driver and revert CMSDK headers changes --- .../TARGET_FVP_MPS2_M0/device/CMSDK_CM0.h | 16 ++++++++-------- .../device/CMSDK_CM0plus.h | 16 ++++++++-------- .../TARGET_FVP_MPS2_M3/device/CMSDK_CM3.h | 16 ++++++++-------- .../TARGET_FVP_MPS2_M4/device/CMSDK_CM4.h | 16 ++++++++-------- .../TARGET_FVP_MPS2_M7/device/CMSDK_CM7.h | 16 ++++++++-------- .../TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c | 19 +++++++------------ 6 files changed, 47 insertions(+), 52 deletions(-) diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/CMSDK_CM0.h b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/CMSDK_CM0.h index fb67de22e6e..1daab820b30 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/CMSDK_CM0.h +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/CMSDK_CM0.h @@ -270,7 +270,7 @@ typedef struct { #define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */ @@ -306,7 +306,7 @@ typedef struct { #define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */ @@ -329,12 +329,12 @@ typedef struct { typedef struct { __IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */ - __I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */ - __IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */ - __O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */ - __I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */ - __I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */ - __IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */ + __I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */ + __IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */ + __O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */ + __I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */ + __I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */ + __IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */ } CMSDK_DUALTIMER_SINGLE_TypeDef; #define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */ diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/CMSDK_CM0plus.h b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/CMSDK_CM0plus.h index 79dc9191125..a63b6c14487 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/CMSDK_CM0plus.h +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/CMSDK_CM0plus.h @@ -271,7 +271,7 @@ typedef struct { #define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */ @@ -307,7 +307,7 @@ typedef struct { #define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */ @@ -330,12 +330,12 @@ typedef struct { typedef struct { __IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */ - __I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */ - __IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */ - __O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */ - __I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */ - __I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */ - __IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */ + __I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */ + __IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */ + __O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */ + __I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */ + __I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */ + __IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */ } CMSDK_DUALTIMER_SINGLE_TypeDef; #define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */ diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/CMSDK_CM3.h b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/CMSDK_CM3.h index 1b8c9f165bd..0b4746d1a73 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/CMSDK_CM3.h +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/CMSDK_CM3.h @@ -272,7 +272,7 @@ typedef struct { #define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */ @@ -308,7 +308,7 @@ typedef struct { #define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */ @@ -331,12 +331,12 @@ typedef struct { typedef struct { __IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */ - __I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */ - __IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */ - __O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */ - __I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */ - __I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */ - __IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */ + __I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */ + __IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */ + __O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */ + __I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */ + __I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */ + __IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */ } CMSDK_DUALTIMER_SINGLE_TypeDef; #define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */ diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/CMSDK_CM4.h b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/CMSDK_CM4.h index d51b4e3c282..a7bb39bfe94 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/CMSDK_CM4.h +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/CMSDK_CM4.h @@ -321,7 +321,7 @@ typedef struct { #define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /*!< CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /*!< CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /*!< CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /*!< CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /*!< CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /*!< CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */ @@ -357,7 +357,7 @@ typedef struct { #define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /*!< CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /*!< CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /*!< CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /*!< CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /*!< CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /*!< CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */ @@ -379,8 +379,8 @@ typedef struct { typedef struct { __IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */ - __I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */ - __IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */ + __I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */ + __IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */ /* TimerEn: Timer Enable */ /* TimerMode: Timer Mode */ /* <0=> Freerunning-mode */ @@ -398,10 +398,10 @@ typedef struct { /* <0=> Wrapping mode */ /* <1=> One-shot mode */ /* */ - __O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */ - __I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */ - __I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */ - __IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */ + __O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */ + __I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */ + __I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */ + __IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */ } CMSDK_DUALTIMER_SINGLE_TypeDef; #define CMSDK_DUALTIMER_LOAD_Pos 0 /*!< CMSDK_DUALTIMER LOAD: LOAD Position */ diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/CMSDK_CM7.h b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/CMSDK_CM7.h index d26198a2e93..2b82b87ef4d 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/CMSDK_CM7.h +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/CMSDK_CM7.h @@ -278,7 +278,7 @@ typedef struct { #define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */ @@ -314,7 +314,7 @@ typedef struct { #define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */ #define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */ -#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ +#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */ #define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */ @@ -337,12 +337,12 @@ typedef struct { typedef struct { __IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */ - __I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */ - __IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */ - __O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */ - __I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */ - __I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */ - __IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */ + __I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */ + __IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */ + __O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */ + __I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */ + __I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */ + __IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */ } CMSDK_DUALTIMER_SINGLE_TypeDef; #define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */ diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c index 74d7597a430..14cae1ed8d7 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c @@ -46,8 +46,8 @@ void us_ticker_init(void) US_TICKER_TIMER1->TimerControl |= CMSDK_DUALTIMER1_CTRL_SIZE_Msk; // set TIMER1 to 32 bit counter US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_SIZE_Msk; // set TIMER2 to 32 bit counter - US_TICKER_TIMER1->TimerControl |= CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk; // set TIMER1 with 4 stages prescale - US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk; // set TIMER2 with 4 stages prescale + US_TICKER_TIMER1->TimerControl |= 0x1 << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos; // set TIMER1 with 4 stages prescale + US_TICKER_TIMER2->TimerControl |= 0x1 << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos; // set TIMER2 with 4 stages prescale US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_MODE_Msk; // set TIMER2 periodic mode @@ -57,7 +57,6 @@ void us_ticker_init(void) US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_EN_Msk; // enable TIMER2 counter NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler); - NVIC_EnableIRQ(US_TICKER_TIMER_IRQn); us_ticker_inited = 1; } @@ -74,27 +73,22 @@ void us_ticker_free(void) uint32_t us_ticker_read() { - if (!us_ticker_inited) { - us_ticker_init(); - } - return ~US_TICKER_TIMER1->TimerValue; } void us_ticker_set_interrupt(timestamp_t timestamp) { - if (!us_ticker_inited) { - us_ticker_init(); - } - uint32_t delta = timestamp - us_ticker_read(); + US_TICKER_TIMER2->TimerControl &= ~CMSDK_DUALTIMER2_CTRL_EN_Msk; // disable TIMER2 US_TICKER_TIMER2->TimerLoad = delta; // Set TIMER2 load value US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_INTEN_Msk; // enable TIMER2 interrupt - + US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_EN_Msk; // enable TIMER2 counter + NVIC_EnableIRQ(US_TICKER_TIMER_IRQn); } void us_ticker_fire_interrupt(void) { + NVIC_EnableIRQ(US_TICKER_TIMER_IRQn); NVIC_SetPendingIRQ(US_TICKER_TIMER_IRQn); } @@ -102,6 +96,7 @@ void us_ticker_fire_interrupt(void) void us_ticker_disable_interrupt(void) { US_TICKER_TIMER2->TimerControl &= ~CMSDK_DUALTIMER2_CTRL_INTEN_Msk; + NVIC_DisableIRQ(US_TICKER_TIMER_IRQn); } void us_ticker_clear_interrupt(void) From 0c8527f5c1406d94e882a6eb71c4cbc1bb0813aa Mon Sep 17 00:00:00 2001 From: Qinghao Shi Date: Mon, 11 Jun 2018 12:01:49 +0100 Subject: [PATCH 3/5] add disable interrupt function in us_ticker_free() --- targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c index 14cae1ed8d7..0b86dc90bb8 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c @@ -62,12 +62,9 @@ void us_ticker_init(void) void us_ticker_free(void) { - if (!us_ticker_inited) { - return; - } - US_TICKER_TIMER1->TimerControl &= ~CMSDK_DUALTIMER1_CTRL_EN_Msk; // disable TIMER1 US_TICKER_TIMER2->TimerControl &= ~CMSDK_DUALTIMER2_CTRL_EN_Msk; // disable TIMER2 + us_ticker_disable_interrupt(); us_ticker_inited = 0; } From 3ba635d233db05661bb7f9944fb90c857dec8571 Mon Sep 17 00:00:00 2001 From: Qinghao Shi Date: Tue, 12 Jun 2018 11:31:16 +0100 Subject: [PATCH 4/5] change us_ticker_inited to static --- targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c index 0b86dc90bb8..5ecbaa30bab 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c @@ -28,7 +28,7 @@ * TIMER1 is for counting, and returns inverted binary when read from it * TIMER2 is for generate interrupts */ -int us_ticker_inited = 0; +static int us_ticker_inited = 0; void us_ticker_init(void) { From 43242589def2d7fcc22f21ae660254320009d471 Mon Sep 17 00:00:00 2001 From: Qinghao Shi Date: Fri, 15 Jun 2018 16:26:00 +0100 Subject: [PATCH 5/5] add comments about TIMER modes and set TIMER2 off by default --- targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c index 5ecbaa30bab..90db88cd7b1 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/us_ticker.c @@ -25,9 +25,15 @@ * with interrupt fired counter reaches 0. * * So 2 Timers are used to construct mbed OS HAL ticker. + * * TIMER1 is for counting, and returns inverted binary when read from it - * TIMER2 is for generate interrupts + * TIMER1 will be kept in free-running mode (default, and not generate interrupts) + * + * TIMER2 is for generating interrupts + * So TIMER2 is set to periodic mode, which start decrement counting form LOADVALUE generates interrupts at 0 + * and TIMER2 also set into one-shot mode, which counter halts when is reaches 0 */ + static int us_ticker_inited = 0; void us_ticker_init(void) @@ -50,11 +56,9 @@ void us_ticker_init(void) US_TICKER_TIMER2->TimerControl |= 0x1 << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos; // set TIMER2 with 4 stages prescale US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_MODE_Msk; // set TIMER2 periodic mode - US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_ONESHOOT_Msk; // set TIMER2 one-shot mode US_TICKER_TIMER1->TimerControl |= CMSDK_DUALTIMER1_CTRL_EN_Msk; // enable TIMER1 counter - US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_EN_Msk; // enable TIMER2 counter NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler); us_ticker_inited = 1; @@ -76,7 +80,7 @@ uint32_t us_ticker_read() void us_ticker_set_interrupt(timestamp_t timestamp) { uint32_t delta = timestamp - us_ticker_read(); - US_TICKER_TIMER2->TimerControl &= ~CMSDK_DUALTIMER2_CTRL_EN_Msk; // disable TIMER2 + US_TICKER_TIMER2->TimerControl &= ~CMSDK_DUALTIMER2_CTRL_EN_Msk; // disable TIMER2 US_TICKER_TIMER2->TimerLoad = delta; // Set TIMER2 load value US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_INTEN_Msk; // enable TIMER2 interrupt US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_EN_Msk; // enable TIMER2 counter @@ -93,6 +97,7 @@ void us_ticker_fire_interrupt(void) void us_ticker_disable_interrupt(void) { US_TICKER_TIMER2->TimerControl &= ~CMSDK_DUALTIMER2_CTRL_INTEN_Msk; + US_TICKER_TIMER2->TimerControl &= ~CMSDK_DUALTIMER2_CTRL_EN_Msk; // disable TIMER2 NVIC_DisableIRQ(US_TICKER_TIMER_IRQn); } @@ -104,7 +109,7 @@ void us_ticker_clear_interrupt(void) const ticker_info_t *us_ticker_get_info(void) { static const ticker_info_t info = { - 1562500, // 4 stages prescale from 25MHz (dived by 16) + 1562500, // 4 stages prescaled from 25MHz (dived by 16) 32 // 32 bit counter }; return &info;