-
Notifications
You must be signed in to change notification settings - Fork 3k
Description
I think I found some minor problem on your IAR's linker file for stm32f412xG, github path is
mbed-os/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_IAR/stm32f412xx.icf
This chip has 256kbyte RAM and comment of linker file says so. But layout is for 128Kbyte RAM,
below is current definition
/* [RAM = 256kb = 0x40000] Vector table dynamic copy: 113 vectors = 452 bytes (0x1C4) to be reserved in RAM /
define symbol NVIC_start = 0x20000000;
define symbol NVIC_end = 0x200001C7; / Aligned on 8 bytes */
define symbol region_RAM_start = 0x200001C8;
define symbol region_RAM_end = 0x2001FFFF;
but I think it must be below
/* [RAM = 256kb = 0x40000] Vector table dynamic copy: 113 vectors = 452 bytes (0x1C4) to be reserved in RAM /
define symbol NVIC_start = 0x20000000;
define symbol NVIC_end = 0x200001C7; / Aligned on 8 bytes /
define symbol region_RAM_start = 0x200001C8;
define symbol region_RAM_end = 0x2003FFFF; / <<<<<< for 256Kbyte */
I hope this report helps your team.