@@ -65,65 +65,3 @@ void nu_busy_wait_us(uint32_t us)
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prev = cur ;
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}
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}
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-
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- /* Delay 4 cycles per round by hand-counting instruction cycles
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- *
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- * The delay function here is implemented by just hand-counting instruction cycles rather than preferred
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- * H/W timer since it is to use in cases where H/W timer is not available. Usually, it can delay at least
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- * 4-cycles per round.
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- *
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- * In modern pipeline core, plus flash performance and other factors, we cannot rely accurately on hand-
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- * counting instruction cycles for expected delay cycles.
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- */
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- #if defined(__CC_ARM )
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- MBED_NOINLINE
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- __asm void nu_delay_cycle_x4 (uint32_t rounds )
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- {
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- // AStyle should not format inline assembly
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- // *INDENT-OFF*
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- 1
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- #if !defined(__CORTEX_M0 )
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- NOP // 1 cycle
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- #endif
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- SUBS a1 , a1 , #1 // 1 cycle
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- BCS %BT1 // 3 cycles(M0)/2 cycles(non-M0)
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- BX lr
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- // *INDENT-ON*
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- }
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- #elif defined (__ICCARM__ )
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- MBED_NOINLINE
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- void nu_delay_cycle_x4 (uint32_t rounds )
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- {
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- __asm volatile (
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- "loop: \n"
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- #if !defined(__CORTEX_M0 )
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- " NOP \n" // 1 cycle
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- #endif
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- " SUBS %0, %0, #1 \n" // 1 cycle
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- " BCS.n loop\n" // 3 cycles(M0)/2 cycles(non-M0)
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- : "+ r "(rounds)
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- :
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- : " cc "
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- );
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- }
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- #elif defined ( __GNUC__ ) || (defined(__ARMCC_VERSION ) && (__ARMCC_VERSION >= 6010050 ))
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- MBED_NOINLINE
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- void nu_delay_cycle_x4 (uint32_t rounds )
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- {
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- __asm__ volatile (
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- "%=:\n\t"
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- #if !defined(__CORTEX_M0 )
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- "NOP\n\t" // 1 cycle
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- #endif
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- #if defined(__thumb__ ) && !defined(__thumb2__ ) && !defined(__ARMCC_VERSION )
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- "SUB %0, #1\n\t" // 1 cycle
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- #else
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- "SUBS %0, %0, #1\n\t" // 1 cycle
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- #endif
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- "BCS %=b\n\t" // 3 cycles(M0)/2 cycles(non-M0)
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- : "+ l "(rounds)
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- :
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- : " cc "
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- );
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- }
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- #endif
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