@@ -136,6 +136,8 @@ void fpga_test_watchdog_timeout_accuracy()
136
136
return ;
137
137
}
138
138
139
+ uint32_t timeout_ms_clock_accuracy = (timeout_ms * features.clock_typical_frequency / features.clock_max_frequency );
140
+
139
141
PinName watchdog_pulse_pin = get_pin_to_restrict (DefaultFormFactor::pins (), DefaultFormFactor::restricted_pins ());
140
142
TEST_ASSERT (watchdog_pulse_pin != NC);
141
143
PinList *blacklist = alloc_extended_pinlist (DefaultFormFactor::restricted_pins (), watchdog_pulse_pin);
@@ -155,9 +157,9 @@ void fpga_test_watchdog_timeout_accuracy()
155
157
if (num_falling_edges > 0 ) {
156
158
actual_timeout_ms = (num_falling_edges - 1 ) * WATCHDOG_PULSE_PERIOD_US / 1000 ;
157
159
}
158
- utest_printf (" The FPGA shield measured %lu ms timeout. " , actual_timeout_ms);
159
- TEST_ASSERT (actual_timeout_ms >= timeout_ms );
160
- TEST_ASSERT (actual_timeout_ms < 2 * timeout_ms );
160
+ utest_printf (" The FPGA shield measured %lu ms timeout (%lu) \n " , actual_timeout_ms, timeout_ms_clock_accuracy );
161
+ TEST_ASSERT (actual_timeout_ms >= timeout_ms_clock_accuracy );
162
+ TEST_ASSERT (actual_timeout_ms < 2 * timeout_ms_clock_accuracy );
161
163
free_pinlist (blacklist);
162
164
return ;
163
165
}
@@ -170,7 +172,7 @@ void fpga_test_watchdog_timeout_accuracy()
170
172
gpio_init_out_ex (&pulse_pin, watchdog_pulse_pin, pulse_pin_value);
171
173
// Init the watchdog and wait for a device reset.
172
174
watchdog_config_t config = { timeout_ms };
173
- if (send_reset_notification (¤t_case, 2 * timeout_ms ) == false ) {
175
+ if (send_reset_notification (¤t_case, 2 * timeout_ms_clock_accuracy ) == false ) {
174
176
TEST_ASSERT_MESSAGE (0 , " Dev-host communication error." );
175
177
free_pinlist (blacklist);
176
178
return ;
0 commit comments