driver/i2c: STM32: Solves excess memory usage issue.

affrinpinhero-2356 · affrinpinhero-2356 · commit 8f24f09df79e · 2021-06-28T18:13:02.000+05:30
This commit solves excess usage of RAM. User can now enable/disable
I2C timing algorithm. Disabling of I2C timing algorithm would
reduce RAM usage.

Signed-off-by: Affrin Pinhero &lt;affrin.pinhero@hcl.com&gt;
diff --git a/targets/TARGET_STM/TARGET_STM32F0/i2c_device.c b/targets/TARGET_STM/TARGET_STM32F0/i2c_device.c
@@ -41,7 +41,13 @@ uint32_t i2c_get_pclk(I2CName i2c)
                 pclk = HSI_VALUE;
                 break;
         }
-    } else {
+    } 
+#if defined I2C2_BASE
+    else if (i2c == I2C_2) {
+        pclk = HAL_RCC_GetSysClockFreq();
+    }
+#endif
+    else {
         // should not happend
         error("I2C: unknown instance");
     }
@@ -78,7 +84,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
     }
 
     else {
+        /* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered. 
+        User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target. 
+        Enabling this may impact performance*/
+        MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
         tim = i2c_compute_timing(pclk, hz);
+#endif
     }
     return tim;
 }
diff --git a/targets/TARGET_STM/TARGET_STM32F0/i2c_device.h b/targets/TARGET_STM/TARGET_STM32F0/i2c_device.h
@@ -48,10 +48,13 @@ extern "C" {
 #define I2CAPI_I2C1_CLKSRC RCC_I2C1CLKSOURCE_SYSCLK
 
 uint32_t i2c_get_pclk(I2CName i2c);
-uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 uint32_t i2c_get_timing(I2CName i2c, int hz);
+
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
+uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
 uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
+#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
 
 #endif // DEVICE_I2C
 
diff --git a/targets/TARGET_STM/TARGET_STM32F3/i2c_device.c b/targets/TARGET_STM/TARGET_STM32F3/i2c_device.c
@@ -122,7 +122,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
     }
 
     else {
+        /* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered. 
+        User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target. 
+        Enabling this may impact performance*/
+        MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
         tim = i2c_compute_timing(pclk, hz);
+#endif
     }
     return tim;
 }
diff --git a/targets/TARGET_STM/TARGET_STM32F3/i2c_device.h b/targets/TARGET_STM/TARGET_STM32F3/i2c_device.h
@@ -62,10 +62,13 @@ extern "C" {
 #define I2CAPI_I2C3_CLKSRC RCC_I2C3CLKSOURCE_SYSCLK
 
 uint32_t i2c_get_pclk(I2CName i2c);
-uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 uint32_t i2c_get_timing(I2CName i2c, int hz);
+
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
+uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
 uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
+#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
 
 #endif // DEVICE_I2C
 
diff --git a/targets/TARGET_STM/TARGET_STM32F7/i2c_device.c b/targets/TARGET_STM/TARGET_STM32F7/i2c_device.c
@@ -133,7 +133,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
                 break;
         }
     } else {
+        /* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered. 
+        User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target. 
+        Enabling this may impact performance*/
+        MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
         tim = i2c_compute_timing(pclk, hz);
+#endif
     }
     return tim;
 }
diff --git a/targets/TARGET_STM/TARGET_STM32F7/i2c_device.h b/targets/TARGET_STM/TARGET_STM32F7/i2c_device.h
@@ -57,10 +57,13 @@ extern "C" {
 #define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_PCLK1
 
 uint32_t i2c_get_pclk(I2CName i2c);
-uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 uint32_t i2c_get_timing(I2CName i2c, int hz);
+
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
+uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
 uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
+#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
 
 #endif // DEVICE_I2C
 
diff --git a/targets/TARGET_STM/TARGET_STM32G0/i2c_device.c b/targets/TARGET_STM/TARGET_STM32G0/i2c_device.c
@@ -78,7 +78,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
                 break;
         }
     } else {
+        /* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered. 
+        User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target. 
+        Enabling this may impact performance*/
+        MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
         tim = i2c_compute_timing(pclk, hz);
+#endif
     }
     return tim;
 }
diff --git a/targets/TARGET_STM/TARGET_STM32G0/i2c_device.h b/targets/TARGET_STM/TARGET_STM32G0/i2c_device.h
@@ -47,10 +47,13 @@ extern "C" {
 #define I2CAPI_I2C2_CLKSRC RCC_I2C2CLKSOURCE_SYSCLK
 
 uint32_t i2c_get_pclk(I2CName i2c);
-uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 uint32_t i2c_get_timing(I2CName i2c, int hz);
+
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
+uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
 uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
+#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
 
 #endif // DEVICE_I2C
 
diff --git a/targets/TARGET_STM/TARGET_STM32G4/i2c_device.c b/targets/TARGET_STM/TARGET_STM32G4/i2c_device.c
@@ -133,7 +133,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
                 break;
         }
     } else {
+        /* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered. 
+        User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target. 
+        Enabling this may impact performance*/
+        MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
         tim = i2c_compute_timing(pclk, hz);
+#endif
     }
     return tim;
 }
diff --git a/targets/TARGET_STM/TARGET_STM32G4/i2c_device.h b/targets/TARGET_STM/TARGET_STM32G4/i2c_device.h
@@ -43,11 +43,13 @@ extern "C" {
 #define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_SYSCLK
 
 uint32_t i2c_get_pclk(I2CName i2c);
-uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 uint32_t i2c_get_timing(I2CName i2c, int hz);
+
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
+uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
 uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
-
+#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
 #endif // DEVICE_I2C
 
 #ifdef __cplusplus
diff --git a/targets/TARGET_STM/TARGET_STM32H7/i2c_device.c b/targets/TARGET_STM/TARGET_STM32H7/i2c_device.c
@@ -116,7 +116,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
                 break;
         }
     } else {
+        /* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered. 
+        User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target. 
+        Enabling this may impact performance*/
+        MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
         tim = i2c_compute_timing(pclk, hz);
+#endif
     }
     return tim;
 }
diff --git a/targets/TARGET_STM/TARGET_STM32H7/i2c_device.h b/targets/TARGET_STM/TARGET_STM32H7/i2c_device.h
@@ -43,10 +43,13 @@ extern "C" {
 #define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_D3PCLK1
 
 uint32_t i2c_get_pclk(I2CName i2c);
-uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 uint32_t i2c_get_timing(I2CName i2c, int hz);
+
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
+uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
 uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
+#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
 
 #endif // DEVICE_I2C
 
diff --git a/targets/TARGET_STM/TARGET_STM32L0/i2c_device.c b/targets/TARGET_STM/TARGET_STM32L0/i2c_device.c
@@ -103,7 +103,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
                 break;
         }
     } else {
+        /* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered. 
+        User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target. 
+        Enabling this may impact performance*/
+        MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
         tim = i2c_compute_timing(pclk, hz);
+#endif
     }
     return tim;
 }
diff --git a/targets/TARGET_STM/TARGET_STM32L0/i2c_device.h b/targets/TARGET_STM/TARGET_STM32L0/i2c_device.h
@@ -54,10 +54,13 @@ extern "C" {
 #define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_SYSCLK
 
 uint32_t i2c_get_pclk(I2CName i2c);
-uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 uint32_t i2c_get_timing(I2CName i2c, int hz);
+
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
+uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
 uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
+#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
 
 #endif // DEVICE_I2C
 
diff --git a/targets/TARGET_STM/TARGET_STM32L4/i2c_device.c b/targets/TARGET_STM/TARGET_STM32L4/i2c_device.c
@@ -168,7 +168,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
                 break;
         }
     } else {
+        /* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered. 
+        User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target. 
+        Enabling this may impact performance*/
+        MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
         tim = i2c_compute_timing(pclk, hz);
+#endif
     }
     return tim;
 }
diff --git a/targets/TARGET_STM/TARGET_STM32L4/i2c_device.h b/targets/TARGET_STM/TARGET_STM32L4/i2c_device.h
@@ -57,10 +57,13 @@ extern "C" {
 #define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_SYSCLK
 
 uint32_t i2c_get_pclk(I2CName i2c);
-uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 uint32_t i2c_get_timing(I2CName i2c, int hz);
+
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
+uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
 uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
+#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
 
 #endif // DEVICE_I2C
 
diff --git a/targets/TARGET_STM/TARGET_STM32L5/i2c_device.c b/targets/TARGET_STM/TARGET_STM32L5/i2c_device.c
@@ -142,7 +142,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
     }
 
     else {
+        /* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered. 
+        User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target. 
+        Enabling this may impact performance */
+        MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
         tim = i2c_compute_timing(pclk, hz);
+#endif
     }
     return tim;
 }
diff --git a/targets/TARGET_STM/TARGET_STM32L5/i2c_device.h b/targets/TARGET_STM/TARGET_STM32L5/i2c_device.h
@@ -43,10 +43,13 @@ extern "C" {
 #define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_SYSCLK
 
 uint32_t i2c_get_pclk(I2CName i2c);
-uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 uint32_t i2c_get_timing(I2CName i2c, int hz);
+
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
+uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
 uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
+#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
 
 #endif // DEVICE_I2C
 
diff --git a/targets/TARGET_STM/TARGET_STM32WB/i2c_device.c b/targets/TARGET_STM/TARGET_STM32WB/i2c_device.c
@@ -140,7 +140,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
     }
 
     else {
+        /* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered. 
+        User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target. 
+        Enabling this may impact performance */
+        MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
         tim = i2c_compute_timing(pclk, hz);
+#endif
     }
     return tim;
 }
diff --git a/targets/TARGET_STM/TARGET_STM32WB/i2c_device.h b/targets/TARGET_STM/TARGET_STM32WB/i2c_device.h
@@ -24,7 +24,7 @@
 extern "C" {
 #endif
 
-/*  Define I2C Device */
+/* Define I2C Device */
 #if DEVICE_I2C
 
 /*  Define IP version */
@@ -50,10 +50,13 @@ extern "C" {
 #define I2CAPI_I2C3_CLKSRC RCC_I2C3CLKSOURCE_SYSCLK
 
 uint32_t i2c_get_pclk(I2CName i2c);
-uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 uint32_t i2c_get_timing(I2CName i2c, int hz);
+
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
+uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
 uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
+#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
 
 #endif // DEVICE_I2C
 
diff --git a/targets/TARGET_STM/TARGET_STM32WL/i2c_device.c b/targets/TARGET_STM/TARGET_STM32WL/i2c_device.c
@@ -125,7 +125,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
     }
 
     else {
+        /* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered.
+        User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target.
+        Enabling this may impact performance */
+        MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
         tim = i2c_compute_timing(pclk, hz);
+#endif
     }
     return tim;
 }
diff --git a/targets/TARGET_STM/TARGET_STM32WL/i2c_device.h b/targets/TARGET_STM/TARGET_STM32WL/i2c_device.h
@@ -42,10 +42,13 @@ extern "C" {
 #define I2CAPI_I2C3_CLKSRC RCC_I2C3CLKSOURCE_SYSCLK
 
 uint32_t i2c_get_pclk(I2CName i2c);
-uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 uint32_t i2c_get_timing(I2CName i2c, int hz);
+
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
+uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
 void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
 uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
+#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
 
 #endif // DEVICE_I2C
 
diff --git a/targets/TARGET_STM/i2c_api.c b/targets/TARGET_STM/i2c_api.c
@@ -43,6 +43,7 @@
 #include "mbed_error.h"
 #include "platform/mbed_power_mgmt.h"
 
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
 /** @defgroup I2C_DEVICE_Private_Constants I2C_DEVICE Private Constants
  * @{
  */
@@ -151,6 +152,7 @@ static const I2C_Charac_t I2C_Charac[] = {
 */
 static I2C_Timings_t I2c_valid_timing[I2C_VALID_TIMING_NBR];
 static uint32_t      I2c_valid_timing_nbr = 0;
+#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO 
 
 #ifndef DEBUG_STDIO
 #   define DEBUG_STDIO 0
@@ -593,10 +595,6 @@ void i2c_frequency(i2c_t *obj, int hz)
     handle->Init.DutyCycle       = I2C_DUTYCYCLE_2;
 #endif
 #ifdef I2C_IP_VERSION_V2
-    /*  Only predefined timing for below frequencies are supported */
-    MBED_ASSERT((hz == 100000) || (hz == 400000) || (hz == 1000000));
-    /* Calculates I2C timing value with respect to I2C input clock and I2C bus frequency */
-    handle->Init.Timing = i2c_get_timing(obj_s->i2c, hz);
     // Enable the Fast Mode Plus capability
     if (hz == 1000000) {
 #if defined(I2C1_BASE) && defined(I2C_FASTMODEPLUS_I2C1)  // sometimes I2C_FASTMODEPLUS_I2Cx is define even if not supported by the chip
@@ -655,6 +653,12 @@ void i2c_frequency(i2c_t *obj, int hz)
         __HAL_RCC_I2C4_CONFIG(I2CAPI_I2C4_CLKSRC);
     }
 #endif
+#ifdef I2C_IP_VERSION_V2
+/*  Only predefined timing for below frequencies are supported */
+    MBED_ASSERT((hz == 100000) || (hz == 400000) || (hz == 1000000));
+    /* Calculates I2C timing value with respect to I2C input clock and I2C bus frequency */
+    handle->Init.Timing = i2c_get_timing(obj_s->i2c, hz);
+#endif
 #if defined(DUAL_CORE) && (TARGET_STM32H7)
     LL_HSEM_ReleaseLock(HSEM, CFG_HW_RCC_SEMID, HSEM_CR_COREID_CURRENT);
 #endif /* DUAL_CORE */
@@ -1514,6 +1518,7 @@ void i2c_abort_asynch(i2c_t *obj)
     HAL_I2C_Master_Abort_IT(handle, Dummy_DevAddress);
 }
 
+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
 /**
   * @brief  Calculate SCLL and SCLH and find best configuration.
   * @param  clock_src_freq I2C source clock in HZ.
@@ -1691,6 +1696,7 @@ uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq)
 
     return ret;
 }
+#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
 
 #endif // DEVICE_I2C_ASYNCH
 
diff --git a/targets/targets.json b/targets/targets.json

Original file line number	Diff line number	Diff line change
`@@ -41,7 +41,13 @@ uint32_t i2c_get_pclk(I2CName i2c)`
`41`	`41`	`pclk = HSI_VALUE;`
`42`	`42`	`break;`
`43`	`43`	`}`
`44`		`- } else {`
	`44`	`+ }`
	`45`	`+#if defined I2C2_BASE`
	`46`	`+ else if (i2c == I2C_2) {`
	`47`	`+ pclk = HAL_RCC_GetSysClockFreq();`
	`48`	`+ }`
	`49`	`+#endif`
	`50`	`+ else {`
`45`	`51`	`// should not happend`
`46`	`52`	`error("I2C: unknown instance");`
`47`	`53`	`}`
`@@ -78,7 +84,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)`
`78`	`84`	`}`
`79`	`85`
`80`	`86`	`else {`
	`87`	`+ /* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered.`
	`88`	`+ User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target.`
	`89`	`+ Enabling this may impact performance*/`
	`90`	`+ MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);`
	`91`	`+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO`
`81`	`92`	`tim = i2c_compute_timing(pclk, hz);`
	`93`	`+#endif`
`82`	`94`	`}`
`83`	`95`	`return tim;`
`84`	`96`	`}`
Original file line number	Diff line number	Diff line change
`@@ -122,7 +122,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)`
`122`	`122`	`}`
`123`	`123`
`124`	`124`	`else {`
	`125`	`+ /* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered.`
	`126`	`+ User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target.`
	`127`	`+ Enabling this may impact performance*/`
	`128`	`+ MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);`
	`129`	`+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO`
`125`	`130`	`tim = i2c_compute_timing(pclk, hz);`
	`131`	`+#endif`
`126`	`132`	`}`
`127`	`133`	`return tim;`
`128`	`134`	`}`
Original file line number	Diff line number	Diff line change
`@@ -133,7 +133,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)`
`133`	`133`	`break;`
`134`	`134`	`}`
`135`	`135`	`} else {`
	`136`	`+ /* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered.`
	`137`	`+ User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target.`
	`138`	`+ Enabling this may impact performance*/`
	`139`	`+ MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);`
	`140`	`+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO`
`136`	`141`	`tim = i2c_compute_timing(pclk, hz);`
	`142`	`+#endif`
`137`	`143`	`}`
`138`	`144`	`return tim;`
`139`	`145`	`}`
Original file line number	Diff line number	Diff line change
`@@ -78,7 +78,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)`
`78`	`78`	`break;`
`79`	`79`	`}`
`80`	`80`	`} else {`
	`81`	`+ /* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered.`
	`82`	`+ User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target.`
	`83`	`+ Enabling this may impact performance*/`
	`84`	`+ MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);`
	`85`	`+#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO`
`81`	`86`	`tim = i2c_compute_timing(pclk, hz);`
	`87`	`+#endif`
`82`	`88`	`}`
`83`	`89`	`return tim;`
`84`	`90`	`}`