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jeromecoutantjeromecoutant
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STM32F1 STM32Cube FW V1.8.0: update for MBED
1 parent 0e19f00 commit 657c355

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11 files changed

+36
-25
lines changed

11 files changed

+36
-25
lines changed

‎targets/TARGET_STM/TARGET_STM32F1/STM32Cube_FW/STM32F1xx_HAL_Driver/Legacy/stm32_hal_legacy.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1409,7 +1409,7 @@
14091409

14101410
#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
14111411

1412-
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32G4)
1412+
// #if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32G4)
14131413
#define HAL_I2C_Master_Sequential_Transmit_IT HAL_I2C_Master_Seq_Transmit_IT
14141414
#define HAL_I2C_Master_Sequential_Receive_IT HAL_I2C_Master_Seq_Receive_IT
14151415
#define HAL_I2C_Slave_Sequential_Transmit_IT HAL_I2C_Slave_Seq_Transmit_IT
@@ -1418,7 +1418,7 @@
14181418
#define HAL_I2C_Master_Sequential_Receive_DMA HAL_I2C_Master_Seq_Receive_DMA
14191419
#define HAL_I2C_Slave_Sequential_Transmit_DMA HAL_I2C_Slave_Seq_Transmit_DMA
14201420
#define HAL_I2C_Slave_Sequential_Receive_DMA HAL_I2C_Slave_Seq_Receive_DMA
1421-
#endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 */
1421+
// #endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 */
14221422

14231423
#if defined(STM32F4)
14241424
#define HAL_FMPI2C_Master_Sequential_Transmit_IT HAL_FMPI2C_Master_Seq_Transmit_IT

‎targets/TARGET_STM/TARGET_STM32F1/STM32Cube_FW/STM32F1xx_HAL_Driver/Legacy/stm32f1xx_hal_can_legacy.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -131,7 +131,7 @@
131131
#error 'The HAL CAN driver cannot be used with its legacy, Please ensure to enable only one HAL CAN module at once in stm32f1xx_hal_conf.h file'
132132
#endif /* HAL_CAN_MODULE_ENABLED */
133133

134-
#warning 'Legacy HAL CAN driver is enabled! It can be used with known limitations, refer to the release notes. However it is recommended to use rather the new HAL CAN driver'
134+
// #warning 'Legacy HAL CAN driver is enabled! It can be used with known limitations, refer to the release notes. However it is recommended to use rather the new HAL CAN driver'
135135

136136
/* Private typedef -----------------------------------------------------------*/
137137
/* Private define ------------------------------------------------------------*/

‎targets/TARGET_STM/TARGET_STM32F1/STM32Cube_FW/STM32F1xx_HAL_Driver/stm32f1xx_hal_adc.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2057,7 +2057,7 @@ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConf
20572057
{
20582058
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
20592059

2060-
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
2060+
if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
20612061
{
20622062
/* Delay for temperature sensor stabilization time */
20632063
/* Compute number of CPU cycles to wait for */

‎targets/TARGET_STM/TARGET_STM32F1/STM32Cube_FW/STM32F1xx_HAL_Driver/stm32f1xx_hal_adc_ex.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1209,7 +1209,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
12091209
{
12101210
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
12111211

1212-
if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR))
1212+
if (sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR)
12131213
{
12141214
/* Delay for temperature sensor stabilization time */
12151215
/* Compute number of CPU cycles to wait for */

‎targets/TARGET_STM/TARGET_STM32F1/STM32Cube_FW/STM32F1xx_HAL_Driver/stm32f1xx_hal_def.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -28,9 +28,9 @@ extern "C" {
2828

2929
/* Includes ------------------------------------------------------------------*/
3030
#include "stm32f1xx.h"
31-
#if defined(USE_HAL_LEGACY)
31+
// #if defined(USE_HAL_LEGACY)
3232
#include "Legacy/stm32_hal_legacy.h"
33-
#endif
33+
// #endif
3434
#include <stddef.h>
3535

3636
/* Exported types ------------------------------------------------------------*/

‎targets/TARGET_STM/TARGET_STM32F1/STM32Cube_FW/STM32F1xx_HAL_Driver/stm32f1xx_hal_eth.c

Lines changed: 20 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -882,7 +882,8 @@ HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameL
882882
uint32_t bufcount = 0U, size = 0U, i = 0U;
883883

884884
/* Process Locked */
885-
__HAL_LOCK(heth);
885+
// MBED patch
886+
//__HAL_LOCK(heth);
886887

887888
/* Set the ETH peripheral state to BUSY */
888889
heth->State = HAL_ETH_STATE_BUSY;
@@ -893,7 +894,8 @@ HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameL
893894
heth->State = HAL_ETH_STATE_READY;
894895

895896
/* Process Unlocked */
896-
__HAL_UNLOCK(heth);
897+
// MBED patch
898+
//__HAL_UNLOCK(heth);
897899

898900
return HAL_ERROR;
899901
}
@@ -905,7 +907,8 @@ HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameL
905907
heth->State = HAL_ETH_STATE_BUSY_TX;
906908

907909
/* Process Unlocked */
908-
__HAL_UNLOCK(heth);
910+
// MBED patch
911+
//__HAL_UNLOCK(heth);
909912

910913
return HAL_ERROR;
911914
}
@@ -978,7 +981,8 @@ HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameL
978981
heth->State = HAL_ETH_STATE_READY;
979982

980983
/* Process Unlocked */
981-
__HAL_UNLOCK(heth);
984+
// MBED patch
985+
//__HAL_UNLOCK(heth);
982986

983987
/* Return function status */
984988
return HAL_OK;
@@ -995,7 +999,8 @@ HAL_StatusTypeDef HAL_ETH_GetReceivedFrame(ETH_HandleTypeDef *heth)
995999
uint32_t framelength = 0U;
9961000

9971001
/* Process Locked */
998-
__HAL_LOCK(heth);
1002+
// MBED patch
1003+
//__HAL_LOCK(heth);
9991004

10001005
/* Check the ETH state to BUSY */
10011006
heth->State = HAL_ETH_STATE_BUSY;
@@ -1031,7 +1036,8 @@ HAL_StatusTypeDef HAL_ETH_GetReceivedFrame(ETH_HandleTypeDef *heth)
10311036
heth->State = HAL_ETH_STATE_READY;
10321037

10331038
/* Process Unlocked */
1034-
__HAL_UNLOCK(heth);
1039+
// MBED patch
1040+
//__HAL_UNLOCK(heth);
10351041

10361042
/* Return function status */
10371043
return HAL_OK;
@@ -1058,7 +1064,8 @@ HAL_StatusTypeDef HAL_ETH_GetReceivedFrame(ETH_HandleTypeDef *heth)
10581064
heth->State = HAL_ETH_STATE_READY;
10591065

10601066
/* Process Unlocked */
1061-
__HAL_UNLOCK(heth);
1067+
// MBED patch
1068+
//__HAL_UNLOCK(heth);
10621069

10631070
/* Return function status */
10641071
return HAL_ERROR;
@@ -1075,7 +1082,8 @@ HAL_StatusTypeDef HAL_ETH_GetReceivedFrame_IT(ETH_HandleTypeDef *heth)
10751082
uint32_t descriptorscancounter = 0U;
10761083

10771084
/* Process Locked */
1078-
__HAL_LOCK(heth);
1085+
// MBED patch
1086+
//__HAL_LOCK(heth);
10791087

10801088
/* Set ETH HAL State to BUSY */
10811089
heth->State = HAL_ETH_STATE_BUSY;
@@ -1132,7 +1140,8 @@ HAL_StatusTypeDef HAL_ETH_GetReceivedFrame_IT(ETH_HandleTypeDef *heth)
11321140
heth->State = HAL_ETH_STATE_READY;
11331141

11341142
/* Process Unlocked */
1135-
__HAL_UNLOCK(heth);
1143+
// MBED patch
1144+
//__HAL_UNLOCK(heth);
11361145

11371146
/* Return function status */
11381147
return HAL_OK;
@@ -1143,7 +1152,8 @@ HAL_StatusTypeDef HAL_ETH_GetReceivedFrame_IT(ETH_HandleTypeDef *heth)
11431152
heth->State = HAL_ETH_STATE_READY;
11441153

11451154
/* Process Unlocked */
1146-
__HAL_UNLOCK(heth);
1155+
// MBED patch
1156+
//__HAL_UNLOCK(heth);
11471157

11481158
/* Return function status */
11491159
return HAL_ERROR;

‎targets/TARGET_STM/TARGET_STM32F1/STM32Cube_FW/STM32F1xx_HAL_Driver/stm32f1xx_hal_iwdg.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -104,7 +104,7 @@
104104
/* Status register need 5 RC LSI divided by prescaler clock to be updated. With
105105
higher prescaler (256), and according to HSI variation, we need to wait at
106106
least 6 cycles so 48 ms. */
107-
#define HAL_IWDG_DEFAULT_TIMEOUT 48U
107+
#define HAL_IWDG_DEFAULT_TIMEOUT 96U // MBED
108108
/**
109109
* @}
110110
*/

‎targets/TARGET_STM/TARGET_STM32F1/STM32Cube_FW/STM32F1xx_HAL_Driver/stm32f1xx_hal_rtc.c

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -221,8 +221,6 @@
221221
/** @defgroup RTC_Private_Functions RTC Private Functions
222222
* @{
223223
*/
224-
static uint32_t RTC_ReadTimeCounter(RTC_HandleTypeDef *hrtc);
225-
static HAL_StatusTypeDef RTC_WriteTimeCounter(RTC_HandleTypeDef *hrtc, uint32_t TimeCounter);
226224
static uint32_t RTC_ReadAlarmCounter(RTC_HandleTypeDef *hrtc);
227225
static HAL_StatusTypeDef RTC_WriteAlarmCounter(RTC_HandleTypeDef *hrtc, uint32_t AlarmCounter);
228226
static HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef *hrtc);
@@ -1584,7 +1582,7 @@ HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef *hrtc)
15841582
* the configuration information for RTC.
15851583
* @retval Time counter
15861584
*/
1587-
static uint32_t RTC_ReadTimeCounter(RTC_HandleTypeDef *hrtc)
1585+
uint32_t RTC_ReadTimeCounter(RTC_HandleTypeDef *hrtc)
15881586
{
15891587
uint16_t high1 = 0U, high2 = 0U, low = 0U;
15901588
uint32_t timecounter = 0U;
@@ -1616,7 +1614,7 @@ static uint32_t RTC_ReadTimeCounter(RTC_HandleTypeDef *hrtc)
16161614
* @param TimeCounter: Counter to write in RTC_CNT registers
16171615
* @retval HAL status
16181616
*/
1619-
static HAL_StatusTypeDef RTC_WriteTimeCounter(RTC_HandleTypeDef *hrtc, uint32_t TimeCounter)
1617+
HAL_StatusTypeDef RTC_WriteTimeCounter(RTC_HandleTypeDef *hrtc, uint32_t TimeCounter)
16201618
{
16211619
HAL_StatusTypeDef status = HAL_OK;
16221620

‎targets/TARGET_STM/TARGET_STM32F1/STM32Cube_FW/STM32F1xx_HAL_Driver/stm32f1xx_hal_rtc.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -549,6 +549,9 @@ HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTim
549549
HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format);
550550
HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
551551
HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
552+
553+
uint32_t RTC_ReadTimeCounter(RTC_HandleTypeDef* hrtc);
554+
HAL_StatusTypeDef RTC_WriteTimeCounter(RTC_HandleTypeDef* hrtc, uint32_t TimeCounter);
552555
/**
553556
* @}
554557
*/

‎targets/TARGET_STM/TARGET_STM32F1/STM32Cube_FW/STM32F1xx_HAL_Driver/stm32f1xx_hal_usart.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2767,7 +2767,7 @@ static void USART_SetConfig(USART_HandleTypeDef *husart)
27672767
CLEAR_BIT(husart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE));
27682768

27692769
/*-------------------------- USART BRR Configuration -----------------------*/
2770-
if((husart->Instance == USART1))
2770+
if (husart->Instance == USART1)
27712771
{
27722772
pclk = HAL_RCC_GetPCLK2Freq();
27732773
husart->Instance->BRR = USART_BRR(pclk, husart->Init.BaudRate);

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