From 69542a68bc2b7fa94f9642eb7677c3eff0e98018 Mon Sep 17 00:00:00 2001 From: deepikabhavnani Date: Thu, 28 Sep 2017 10:42:57 -0500 Subject: [PATCH 1/4] OS_IDLE_THREAD_STACK_SIZE was increased to 512bytes for tickless RTX --- docs/advanced/cmsis-rtos.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/advanced/cmsis-rtos.md b/docs/advanced/cmsis-rtos.md index 93bb80ab04..03baffd0a7 100644 --- a/docs/advanced/cmsis-rtos.md +++ b/docs/advanced/cmsis-rtos.md @@ -16,7 +16,7 @@ Option | Value | Description | -------|-------|-------------| `OS_STACK_SIZE` | 4K or 2K | For a normal target, the thread stack size is set to 4K; for constrained targets, it's 2K. | `OS_TIMER_THREAD_STACK_SIZE` | 768B | Timer thread stack set to 768B that's necessary to support the C++ wrappers (4 instances), but it may require changing to support larger number of active timers. | -`OS_IDLE_THREAD_STACK_SIZE` | 256B | Required to handle mbed OS wrappers | +`OS_IDLE_THREAD_STACK_SIZE` | 512B | Required to handle mbed OS wrappers | `OS_DYNAMIC_MEM_SIZE` | 0 | RTX dynamic memory is disabled. | `OS_MUTEX_OBJ_MEM` | 1 or 0 | For ARMC, use 1; for other toolchains, it's 0. ARMC uses statically allocated mutexes internally. | `OS_MUTEX_NUM` | 6 or 0 | For ARMC, use 6; for other toolchains, it's 0. ARMC uses statically allocated mutexes internally. | From 693ddc5dc027ecb95bc7d6d7cc1e5ad6f11e78d5 Mon Sep 17 00:00:00 2001 From: deepikabhavnani Date: Thu, 28 Sep 2017 11:07:18 -0500 Subject: [PATCH 2/4] Cortex specific RTX was moved to TARGET_CORTEX in PR #5003 --- docs/advanced/cmsis-rtos.md | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/docs/advanced/cmsis-rtos.md b/docs/advanced/cmsis-rtos.md index 03baffd0a7..d60f0f358f 100644 --- a/docs/advanced/cmsis-rtos.md +++ b/docs/advanced/cmsis-rtos.md @@ -33,13 +33,13 @@ CMSIS5 | mbed OS | Explanation | `CMSIS_5/CMSIS/Core/Include/tz_context.h` | `mbed-os/cmsis/` | TrustZone code | `CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h` | `mbed-os/cmsis/` | Toolchain generic code | `CMSIS_5/CMSIS/Core/Include/cmsis_{armcc,armclang,gcc}.h` | `mbed-os/cmsis/TOOLCHAIN_{ARM,GCC}/` | Toolchain specific code | -`CMSIS_5/CMSIS/RTOS2/Include/cmsis_os2.h` | `mbed-os/rtos/rtx2/TARGET_CORTEX_M/` | RTX main header | -`CMSIS_5/CMSIS/RTOS2/RTX/Config/` | `mbed-os/rtos/rtx2/TARGET_CORTEX_M/` | RTX configuration files | -`CMSIS_5/CMSIS/RTOS2/RTX/Include1/` | `mbed-os/rtos/rtx/` | RTOS1 compatibility layer | -`CMSIS_5/CMSIS/RTOS2/RTX/Include/` | `mbed-os/rtos/rtx2/TARGET_CORTEX_M/` | RTX definitions | -`CMSIS_5/CMSIS/RTOS2/RTX/Source/rtx_*` | `mbed-os/rtos/rtx2/TARGET_CORTEX_M/` | RTX sources | +`CMSIS_5/CMSIS/RTOS2/Include/cmsis_os2.h` | `mbed-os/rtos/TARGET_CORTEX/rtx5/` | RTX main header | +`CMSIS_5/CMSIS/RTOS2/RTX/Config/` | `mbed-os/rtos/TARGET_CORTEX/rtx5` | RTX configuration files | +`CMSIS_5/CMSIS/RTOS2/RTX/Include1/` | `mbed-os/rtos/TARGET_CORTEX/rtx4` | RTOS1 compatibility layer | +`CMSIS_5/CMSIS/RTOS2/RTX/Include/` | `mbed-os/rtos/TARGET_CORTEX/rtx5` | RTX definitions | +`CMSIS_5/CMSIS/RTOS2/RTX/Source/rtx_*` | `mbed-os/rtos/TARGET_CORTEX/rtx5` | RTX sources | `CMSIS_5/CMSIS/RTOS2/RTX/Source/svc_user.c` | `mbed-os/rtos/rtx2/TARGET_CORTEX_M/` | RTX SVC user table | -`CMSIS_5/CMSIS/RTOS2/RTX/Source/{ARM,GCC,IAR}/` | `mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_{M0,M0P,M3,RTOS_M4_M7}/TOOLCHAIN_{ARM,GCC,IAR}` | Toolchain and core specific exception handlers | +`CMSIS_5/CMSIS/RTOS2/RTX/Source/{ARM,GCC,IAR}/` | `mbed-os/rtos/TARGET_CORTEX/rtx5/TARGET_{M0,M0P,M3,RTOS_M4_M7,M23,M33}/TOOLCHAIN_{ARM,GCC,IAR}` | Toolchain and core specific exception handlers | ## Modification From 90139ccbaf5976729653ef550608d5e2c04f3754 Mon Sep 17 00:00:00 2001 From: deepikabhavnani Date: Thu, 28 Sep 2017 11:10:05 -0500 Subject: [PATCH 3/4] IAR context switch file was added for cortex-M23 in PR #4875 --- docs/advanced/cmsis-rtos.md | 1 + 1 file changed, 1 insertion(+) diff --git a/docs/advanced/cmsis-rtos.md b/docs/advanced/cmsis-rtos.md index d60f0f358f..da97494874 100644 --- a/docs/advanced/cmsis-rtos.md +++ b/docs/advanced/cmsis-rtos.md @@ -69,6 +69,7 @@ Filename | Description | `irq_cm4.s` | For all toolchains: added case for Cortex M4 cores without VFP | `svc_user.c` | Removed as its template file and should not be in our code base | `rt_OsEventObserver.{c,h}` | Added an interface for uVisor to be notified about certain events from privileged code | +`irq_armv8mbl.S` | IAR toolchain: added file for Cortex M23 core | ### Other From 481140a61ddb55fc85d5a1820bb00281ef93e0cb Mon Sep 17 00:00:00 2001 From: deepikabhavnani Date: Thu, 28 Sep 2017 11:13:51 -0500 Subject: [PATCH 4/4] IAR context switch file was added for cortex-M33 in PR #5105 --- docs/advanced/cmsis-rtos.md | 1 + 1 file changed, 1 insertion(+) diff --git a/docs/advanced/cmsis-rtos.md b/docs/advanced/cmsis-rtos.md index da97494874..7ddd54dea0 100644 --- a/docs/advanced/cmsis-rtos.md +++ b/docs/advanced/cmsis-rtos.md @@ -70,6 +70,7 @@ Filename | Description | `svc_user.c` | Removed as its template file and should not be in our code base | `rt_OsEventObserver.{c,h}` | Added an interface for uVisor to be notified about certain events from privileged code | `irq_armv8mbl.S` | IAR toolchain: added file for Cortex M23 core | +`irq_armv8mml.S` | IAR toolchain: added file for Cortex M33 core | ### Other