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| 1 | +/** |
| 2 | + * @file IO_Config_Override.c |
| 3 | + * @brief Alternative IO for LPC11U35 based Hardware Interface Circuit |
| 4 | + * |
| 5 | + * DAPLink Interface Firmware |
| 6 | + * Copyright (c) 2009-2017, ARM Limited, All Rights Reserved |
| 7 | + * SPDX-License-Identifier: Apache-2.0 |
| 8 | + * |
| 9 | + * Licensed under the Apache License, Version 2.0 (the "License"); you may |
| 10 | + * not use this file except in compliance with the License. |
| 11 | + * You may obtain a copy of the License at |
| 12 | + * |
| 13 | + * http://www.apache.org/licenses/LICENSE-2.0 |
| 14 | + * |
| 15 | + * Unless required by applicable law or agreed to in writing, software |
| 16 | + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
| 17 | + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 18 | + * See the License for the specific language governing permissions and |
| 19 | + * limitations under the License. |
| 20 | + */ |
| 21 | + |
| 22 | +/** |
| 23 | + * The VBLUno51 board use PIO0_9(18) pin for TGT_SWCLK function. |
| 24 | + * Because it uses RTS/CTS pins for UART Hardware flow control feature. |
| 25 | + */ |
| 26 | + |
| 27 | +#ifndef __IO_CONFIG_H__ |
| 28 | +#define __IO_CONFIG_H__ |
| 29 | + |
| 30 | +#include "LPC11Uxx.h" |
| 31 | +#include "daplink.h" |
| 32 | + |
| 33 | +// This GPIO configuration is only valid for the LPC11U35 HIC |
| 34 | +COMPILER_ASSERT(DAPLINK_HIC_ID == DAPLINK_HIC_ID_LPC11U35); |
| 35 | + |
| 36 | +// Peripheral register bit masks (used for pin inits) |
| 37 | +#define FUNC_0 0 |
| 38 | +#define FUNC_1 1 |
| 39 | +#define PULL_DOWN_ENABLED (1 << 3) |
| 40 | +#define PULL_UP_ENABLED (2 << 3) |
| 41 | +#define OPENDRAIN (1 << 10) |
| 42 | + |
| 43 | +// DAP LED PIO0_21 |
| 44 | +#define PIN_DAP_LED_PORT 0 |
| 45 | +#define PIN_DAP_LED_BIT 21 |
| 46 | +#define PIN_DAP_LED (1 << PIN_DAP_LED_BIT) |
| 47 | +#define PIN_DAP_LED_IOCON LPC_IOCON->PIO0_21 |
| 48 | +#define PIN_DAP_LED_IOCON_INIT (FUNC_0 | PULL_UP_ENABLED) |
| 49 | + |
| 50 | +// MSD LED PIO0_20 |
| 51 | +#define PIN_MSD_LED_PORT 0 |
| 52 | +#define PIN_MSD_LED_BIT 20 |
| 53 | +#define PIN_MSD_LED (1 << PIN_MSD_LED_BIT) |
| 54 | +#define PIN_MSD_LED_IOCON LPC_IOCON->PIO0_20 |
| 55 | +#define PIN_MSD_LED_IOCON_INIT (FUNC_0 | PULL_UP_ENABLED) |
| 56 | + |
| 57 | +// CDC LED PIO0_11 |
| 58 | +#define PIN_CDC_LED_PORT 0 |
| 59 | +#define PIN_CDC_LED_BIT 11 |
| 60 | +#define PIN_CDC_LED (1 << PIN_CDC_LED_BIT) |
| 61 | +#define PIN_CDC_LED_IOCON LPC_IOCON->TDI_PIO0_11 |
| 62 | +#define PIN_CDC_LED_IOCON_INIT (FUNC_1 | PULL_UP_ENABLED) |
| 63 | + |
| 64 | +// Non-Forwarded Reset in PIN PIO1_19 |
| 65 | +#define PIN_RESET_IN_PORT 1 |
| 66 | +#define PIN_RESET_IN_BIT 19 |
| 67 | +#define PIN_RESET_IN (1 << PIN_RESET_IN_BIT) |
| 68 | +#define PIN_RESET_IN_IOCON LPC_IOCON->PIO1_19 |
| 69 | +#define PIN_RESET_IN_IOCON_INIT (FUNC_0 | OPENDRAIN | PULL_UP_ENABLED) |
| 70 | + |
| 71 | +// Forwarded Reset in PIN PIO0_1 |
| 72 | +#define PIN_RESET_IN_FWRD_PORT 0 |
| 73 | +#define PIN_RESET_IN_FWRD_BIT 1 |
| 74 | +#define PIN_RESET_IN_FWRD (1 << PIN_RESET_IN_FWRD_BIT) |
| 75 | +#define PIN_RESET_IN_FWRD_IOCON LPC_IOCON->PIO0_1 |
| 76 | +#define PIN_RESET_IN_FWRD_IOCON_INIT (FUNC_0 | OPENDRAIN | PULL_UP_ENABLED) |
| 77 | + |
| 78 | +// nRESET OUT Pin PIO0_2 |
| 79 | +#define PIN_nRESET_PORT 0 |
| 80 | +#define PIN_nRESET_BIT 2 |
| 81 | +#define PIN_nRESET (1 << PIN_nRESET_BIT) |
| 82 | +#define PIN_nRESET_IOCON LPC_IOCON->PIO0_2 |
| 83 | +#define PIN_nRESET_IOCON_INIT (FUNC_0 | OPENDRAIN | PULL_UP_ENABLED) |
| 84 | + |
| 85 | +// SWCLK/TCK Pin PIO0_9 |
| 86 | +#define PIN_SWCLK_PORT 0 |
| 87 | +#define PIN_SWCLK_BIT 9 |
| 88 | +#define PIN_SWCLK (1 << PIN_SWCLK_BIT) |
| 89 | +#define PIN_SWCLK_TCK_IOCON LPC_IOCON->PIO0_9 |
| 90 | +#define PIN_SWCLK_TCK_IOCON_INIT (FUNC_0 | PULL_UP_ENABLED) |
| 91 | + |
| 92 | +// SWDIO/TMS In/Out Pin PIO0_8 |
| 93 | +#define PIN_SWDIO_PORT 0 |
| 94 | +#define PIN_SWDIO_BIT 8 |
| 95 | +#define PIN_SWDIO (1 << PIN_SWDIO_BIT) |
| 96 | +#define PIN_SWDIO_TMS_IOCON LPC_IOCON->PIO0_8 |
| 97 | +#define PIN_SWDIO_TMS_IOCON_INIT (FUNC_0 | PULL_UP_ENABLED) |
| 98 | + |
| 99 | +// TDI Pin PIO0_17 |
| 100 | +#define PIN_TDI_PORT 17 |
| 101 | +#define PIN_TDI_BIT 17 |
| 102 | +#define PIN_TDI (1 << PIN_TDI_BIT) |
| 103 | +#define PIN_TDI_IOCON LPC_IOCON->PIO0_17 |
| 104 | +#define PIN_TDI_IOCON_INIT (FUNC_0 | PULL_UP_ENABLED) |
| 105 | + |
| 106 | +// SWO/TDO Pin PIO0_9 |
| 107 | +#define PIN_TDO_PORT 9 |
| 108 | +#define PIN_TDO_BIT 9 |
| 109 | +#define PIN_TDO (1 << PIN_TDO_BIT) |
| 110 | +#define PIN_TDO_IOCON LPC_IOCON->PIO0_9 |
| 111 | +#define PIN_TDO_IOCON_INIT (FUNC_0 | PULL_UP_ENABLED) |
| 112 | + |
| 113 | +#endif |
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