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---
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title: Arm C Language Extensions
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- version: 2024Q2
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- date-of-issue: 21 June 2024
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+ version: 2024Q3
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+ date-of-issue: 30 September 2024
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# LaTeX specific variables
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copyright-text: "Copyright: see section \\texorpdfstring{\\nameref{copyright}}{Copyright}."
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draftversion: true
@@ -178,6 +178,7 @@ unless a different support level is specified in the text.
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| 2023Q2 | 04 August 2023 | Arm | See [Changes between ACLE Q4 2022 and ACLE Q2 2023](#changes-between-acle-q4-2022-and-acle-q2-2023) |
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| 2024Q1 | 11 April 2024 | Arm | See [Changes between ACLE Q2 2023 and ACLE Q1 2024](#changes-between-acle-q2-2023-and-acle-q1-2024) |
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| 2024Q2 | 21 June 2024 | Arm | See [Changes between ACLE Q1 2024 and ACLE Q2 2024](#changes-between-acle-q1-2024-and-acle-q2-2024) |
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+ | 2024Q3 | 30 September 2024 | Arm | See [Changes between ACLE Q2 2024 and ACLE Q3 2024](#changes-between-acle-q2-2024-and-acle-q3-2024) |
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#### Changes between ACLE Q2 2017 and ACLE Q2 2018
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@@ -394,23 +395,21 @@ Armv8.4-A [[ARMARMv84]](#ARMARMv84). Support is added for the Dot Product intrin
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* Added [**Alpha**](#current-status-and-anticipated-changes)
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support for SVE2.1 (FEAT_SVE2p1).
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- #### Changes for next release
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+ #### Changes between ACLE Q2 2024 and ACLE Q3 2024
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* Fixed incorrect system register dependencies in Function Multi Versioning.
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* Added a requirement for function version declaration in Function Multi Versioning.
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- * Fixed some rendering issues in the online Markdown documentation and fixed
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- a misplaced anchor.
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* Added `__FUNCTION_MULTI_VERSIONING_SUPPORT_LEVEL` to indicate the support
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level of the [Function Multi Versioning](#function-multi-versioning).
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- * Unified Function Multi Versioning features sha1, sha2.
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- * Unified Function Multi Versioning features ls64, ls64_v, ls64_accdata.
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+ * Unified Function Multi Versioning features sha1 and sha2.
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+ * Unified Function Multi Versioning features ls64, ls64_v, and ls64_accdata.
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* Added [**Alpha**](#current-status-and-anticipated-changes)
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support for SME2.1 (FEAT_SME2p1).
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* Removed requirement to add preprocessor guards for header files.
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* Added specifications for floating-point absolute minimum
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and maximum intrinsics (FEAT_FAMINMAX).
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* Added specifications for table lookup intrinsics (FEAT_LUT, FEAT_SME_LUTv2).
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- * Release support level of the [Custom Datapath Extension](#custom-datapath-extension).
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+ * Added Release support level for the [Custom Datapath Extension](#custom-datapath-extension).
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* Added [**Alpha**](#current-status-and-anticipated-changes)
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support for modal 8-bit floating point intrinsics.
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@@ -1035,8 +1034,9 @@ Including `<arm_sve.h>` also includes the following header files:
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`<arm_neon_sve_bridge.h>` defines intrinsics for moving data between
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Neon and SVE vector types; see [NEON-SVE Bridge](#neon-sve-bridge)
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- for details. The `__ARM_NEON_SVE_BRIDGE` macro should be tested
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- before including the header:
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+ for details. Before including the header, you should test the
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+ `__ARM_NEON_SVE_BRIDGE` macro.
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+ :
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``` c
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#ifdef __ARM_NEON_SVE_BRIDGE
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void foo() {
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#ifdef __ARM_FEATURE_SVE
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// The user should make no assumptions that the target attribute
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- // has enabled the __ARM_FEATURE_SVE macro.
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+ // enables the __ARM_FEATURE_SVE macro.
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#endif
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}
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```
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- The compiler may add additional restrictions to the intrinsics beyond what is
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+ The compiler might add additional restrictions to the intrinsics beyond what is
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captured by the ACLE macros depending on the context in which the intrinsics
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are used. For example:
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@@ -1118,7 +1118,7 @@ are used. For example:
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```
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If `__ARM_FEATURE_SME` evaluates to `true` the SME intrinsic `svst1_hor_za8`
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- is available, but `foo` may still fail to compile because the call does not
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+ is available, but `foo` might still fail to compile because the call does not
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occur in a [streaming statement](#streaming-statement).
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## Attributes
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when supported by the hardware.
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bfloat types are only available when the `__bf16` type is defined, that is,
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- when supported by the hardware. The bfloat types are all opaque types. That is
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- to say they can only be used by intrinsics.
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+ when supported by the hardware. The bfloat types are all opaque types. That is,
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+ they can only be used by intrinsics.
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- The FP8 types are all opaque types. That is to say they can only be used
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- by intrinsics.
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+ The FP8 types are all opaque types. That is, they can only be used by
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+ intrinsics.
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### Advanced SIMD Scalar data types
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@@ -6713,7 +6713,7 @@ single vectors:
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| **Signed integer** | **Unsigned integer** | **Floating-point** | |
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| -------------------- | -------------------- | -------------------- | -------------------- |
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- | `svint8_t` | `svuint8_t` | | `svmfloat8_t |
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+ | `svint8_t` | `svuint8_t` | | `svmfloat8_t` |
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| `svint16_t` | `svuint16_t` | `svfloat16_t` | `svbfloat16_t` |
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| `svint32_t` | `svuint32_t` | `svfloat32_t` | |
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| `svint64_t` | `svuint64_t` | `svfloat64_t` | |
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### SME2.1 instruction intrinsics
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The specification for SME2.1 is in
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- [**Alpha** state](#current-status-and-anticipated-changes) and may change or be
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- extended in the future.
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+ [**Alpha** state](#current-status-and-anticipated-changes) and might change or
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+ be extended in the future.
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The intrinsics in this section are defined by the header file
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[`<arm_sme.h>`](#arm_sme.h) when `__ARM_FEATURE_SME2p1` is defined.
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#### BFCVTN, FCVTN
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- Half-precision and BFloat16 convert, narrow and interleave to 8-bit
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+ Half-precision and BFloat16 convert, narrow, and interleave to 8-bit
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floating-point.
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``` c
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// Variant is also available for: _bf16_x2
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#### FCVTNT, FCVTNB
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- Single-precision convert, narrow and interleave to 8-bit floating-point (top and bottom).
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+ Single-precision convert, narrow, and interleave to 8-bit floating-point (top and bottom).
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``` c
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svmfloat8_t svcvtnt_mf8[_f32_x2]_fpm(svmfloat8_t zd, svfloat32x2_t zn, fpm_t fpm);
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svmfloat8_t svcvtnb_mf8[_f32_x2]_fpm(svmfloat8_t zd, svfloat32x2_t zn, fpm_t fpm);
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