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target/arm: Implement SMSTART, SMSTOP
These two instructions are aliases of MSR (immediate). Use the two helpers to properly implement svcr_write. Reviewed-by: Peter Maydell <[email protected]> Signed-off-by: Richard Henderson <[email protected]> Message-id: [email protected] Signed-off-by: Peter Maydell <[email protected]>
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7 files changed

+112
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target/arm/cpu.h

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Original file line numberDiff line numberDiff line change
@@ -1120,6 +1120,7 @@ void aarch64_sve_change_el(CPUARMState *env, int old_el,
11201120
int new_el, bool el0_a64);
11211121
void aarch64_add_sve_properties(Object *obj);
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void aarch64_add_pauth_properties(Object *obj);
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void arm_reset_sve_state(CPUARMState *env);
11231124

11241125
/*
11251126
* SVE registers are encoded in KVM's memory in an endianness-invariant format.

target/arm/helper-sme.h

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,21 @@
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/*
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* AArch64 SME specific helper definitions
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*
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* Copyright (c) 2022 Linaro, Ltd
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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DEF_HELPER_FLAGS_2(set_pstate_sm, TCG_CALL_NO_RWG, void, env, i32)
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DEF_HELPER_FLAGS_2(set_pstate_za, TCG_CALL_NO_RWG, void, env, i32)

target/arm/helper.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6366,9 +6366,9 @@ static CPAccessResult access_esm(CPUARMState *env, const ARMCPRegInfo *ri,
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static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
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uint64_t value)
63686368
{
6369-
value &= R_SVCR_SM_MASK | R_SVCR_ZA_MASK;
6370-
/* TODO: Side effects. */
6371-
env->svcr = value;
6369+
helper_set_pstate_sm(env, FIELD_EX64(value, SVCR, SM));
6370+
helper_set_pstate_za(env, FIELD_EX64(value, SVCR, ZA));
6371+
arm_rebuild_hflags(env);
63726372
}
63736373

63746374
static void smcr_write(CPUARMState *env, const ARMCPRegInfo *ri,

target/arm/helper.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1022,6 +1022,7 @@ DEF_HELPER_FLAGS_6(gvec_bfmlal_idx, TCG_CALL_NO_RWG,
10221022
#ifdef TARGET_AARCH64
10231023
#include "helper-a64.h"
10241024
#include "helper-sve.h"
1025+
#include "helper-sme.h"
10251026
#endif
10261027

10271028
#include "helper-mve.h"

target/arm/meson.build

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -47,6 +47,7 @@ arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
4747
'mte_helper.c',
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'pauth_helper.c',
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'sve_helper.c',
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'sme_helper.c',
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'translate-a64.c',
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'translate-sve.c',
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))

target/arm/sme_helper.c

Lines changed: 61 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,61 @@
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/*
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* ARM SME Operations
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*
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* Copyright (c) 2022 Linaro, Ltd.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "internals.h"
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#include "exec/helper-proto.h"
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25+
/* ResetSVEState */
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void arm_reset_sve_state(CPUARMState *env)
27+
{
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memset(env->vfp.zregs, 0, sizeof(env->vfp.zregs));
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/* Recall that FFR is stored as pregs[16]. */
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memset(env->vfp.pregs, 0, sizeof(env->vfp.pregs));
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vfp_set_fpcr(env, 0x0800009f);
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}
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void helper_set_pstate_sm(CPUARMState *env, uint32_t i)
35+
{
36+
if (i == FIELD_EX64(env->svcr, SVCR, SM)) {
37+
return;
38+
}
39+
env->svcr ^= R_SVCR_SM_MASK;
40+
arm_reset_sve_state(env);
41+
}
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void helper_set_pstate_za(CPUARMState *env, uint32_t i)
44+
{
45+
if (i == FIELD_EX64(env->svcr, SVCR, ZA)) {
46+
return;
47+
}
48+
env->svcr ^= R_SVCR_ZA_MASK;
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/*
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* ResetSMEState.
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*
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* SetPSTATE_ZA zeros on enable and disable. We can zero this only
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* on enable: while disabled, the storage is inaccessible and the
55+
* value does not matter. We're not saving the storage in vmstate
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* when disabled either.
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*/
58+
if (i) {
59+
memset(env->zarray, 0, sizeof(env->zarray));
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}
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}

target/arm/translate-a64.c

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1762,6 +1762,30 @@ static void handle_msr_i(DisasContext *s, uint32_t insn,
17621762
}
17631763
break;
17641764

1765+
case 0x1b: /* SVCR* */
1766+
if (!dc_isar_feature(aa64_sme, s) || crm < 2 || crm > 7) {
1767+
goto do_unallocated;
1768+
}
1769+
if (sme_access_check(s)) {
1770+
bool i = crm & 1;
1771+
bool changed = false;
1772+
1773+
if ((crm & 2) && i != s->pstate_sm) {
1774+
gen_helper_set_pstate_sm(cpu_env, tcg_constant_i32(i));
1775+
changed = true;
1776+
}
1777+
if ((crm & 4) && i != s->pstate_za) {
1778+
gen_helper_set_pstate_za(cpu_env, tcg_constant_i32(i));
1779+
changed = true;
1780+
}
1781+
if (changed) {
1782+
gen_rebuild_hflags(s);
1783+
} else {
1784+
s->base.is_jmp = DISAS_NEXT;
1785+
}
1786+
}
1787+
break;
1788+
17651789
default:
17661790
do_unallocated:
17671791
unallocated_encoding(s);

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